Chandler Carruth 81ff90db44 First major step toward addressing PR14059. This teaches SROA to handle ... cases where we have partial integer loads and stores to an otherwise promotable alloca to widen[1] those loads and stores to cover the entire alloca and bitcast them into the appropriate type such that promotion can proceed. These partial loads and stores stem from an annoying confluence of ARM's calling convention and ABI lowering and the FCA pre-splitting which takes place in SROA. Clang lowers a { double, double } in-register function argument as a [4 x i32] function argument to ensure it is placed into integer 32-bit registers (a really unnerving implicit contract between Clang and the ARM backend I would add). This results in a FCA load of [4 x i32]* from the { double, double } alloca, and SROA decomposes this into a sequence of i32 loads and stores. Inlining proceeds, code gets folded, but at the end of the day, we still have i32 stores to the low and high halves of a double alloca. Widening these to be i64 operations, and bitcasting them to double prior to loading or storing allows promotion to proceed for these allocas. I looked quite a bit changing the IR which Clang produces for this case to be more friendly, but small changes seem unlikely to help. I think the best representation we could use currently would be to pass 4 i32 arguments thereby avoiding any FCAs, but that would still require this fix. It seems like it might eventually be nice to somehow encode the ABI register selection choices outside of the parameter type system so that the parameter can be a { double, double }, but the CC register annotations indicate that this should be passed via 4 integer registers. This patch does not address the second problem in PR14059, which is the reverse: when a struct alloca is loaded as a *larger* single integer. This patch also does not address some of the code quality issues with the FCA-splitting. Those don't actually impede any optimizations really, but they're on my list to clean up. [1]: Pedantic footnote: for those concerned about memory model issues here, this is safe. For the alloca to be promotable, it cannot escape or have any use of its address that could allow these loads or stores to be racing. Thus, widening is always safe. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165928 91177308-0d34-0410-b5e6-96231b3b80d8		2012-10-15 08:40:30 +00:00
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Analysis	fix warning	2012-10-12 02:04:32 +00:00
Archive	Mark checkSignature const, and in turn stop casting away const from	2012-09-05 22:09:23 +00:00
AsmParser	Add an enum for the return and function indexes into the AttrListPtr object. This gets rid of some magic numbers.	2012-10-15 07:29:08 +00:00
Bitcode	Attributes Rewrite	2012-10-15 04:46:55 +00:00
CodeGen	Remove the bitwise XOR operator from the Attributes class. Replace it with the equivalent from the builder class.	2012-10-14 06:56:13 +00:00
DebugInfo	Mark unimplemented copy constructors and copy assignment operators as LLVM_DELETED_FUNCTION.	2012-09-18 02:01:41 +00:00
ExecutionEngine	Check section type rather than assuming it's code when emitting sections while processing relocations.	2012-10-12 23:53:16 +00:00
Linker	Move the "findUsedStructTypes" functionality outside of the Module class.	2012-08-03 00:30:35 +00:00
MC	[ms-inline asm] Remove the MatchInstruction() function. Previously, this was	2012-10-13 00:26:04 +00:00
Object	Cosmetic changes	2012-10-10 01:45:52 +00:00
Support	Add powerpc-ibm-aix to Triple. Patch by Kai.	2012-10-12 11:08:57 +00:00
TableGen	tblgen: Compile TableGen without RTTI.	2012-10-10 20:27:18 +00:00
Target	Attributes Rewrite	2012-10-15 04:46:55 +00:00
Transforms	First major step toward addressing PR14059. This teaches SROA to handle	2012-10-15 08:40:30 +00:00
VMCore	Add an enum for the return and function indexes into the AttrListPtr object. This gets rid of some magic numbers.	2012-10-15 07:29:08 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile