llvm-6502/test/MC/Disassembler
Chad Rosier 8225b23c6a Update comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192806 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-16 16:30:10 +00:00
..
AArch64 Update comment. 2013-10-16 16:30:10 +00:00
ARM
Mips Mips: Disassemble sign-extended 64 bit immediates properly. 2013-10-11 19:05:08 +00:00
SystemZ
X86 Add disassembler support for SSE4.1 register/register form of PEXTRW. There is a shorter encoding that was part of SSE2, but a memory form was added in SSE4.1. This is the register form of that encoding. 2013-10-14 01:42:32 +00:00
XCore