Evan Cheng 8239daf7c8 Two sets of changes. Sorry they are intermingled. ... 1. Fix pre-ra scheduler so it doesn't try to push instructions above calls to "optimize for latency". Call instructions don't have the right latency and this is more likely to use introduce spills. 2. Fix if-converter cost function. For ARM, it should use instruction latencies, not # of micro-ops since multi-latency instructions is completely executed even when the predicate is false. Also, some instruction will be "slower" when they are predicated due to the register def becoming implicit input. rdar://8598427 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118135 91177308-0d34-0410-b5e6-96231b3b80d8		2010-11-03 00:45:17 +00:00
..
Analysis	Fix DIType verifier. The element 3 is DIFile now.	2010-11-02 20:41:13 +00:00
Archive
AsmParser
Bitcode	Fix PR8494: when reading invalid bitcode, getTypeByID may return	2010-10-28 15:47:26 +00:00
CodeGen	Two sets of changes. Sorry they are intermingled.	2010-11-03 00:45:17 +00:00
CompilerDriver	llvmc: Fix tool finding logic.	2010-11-02 20:47:41 +00:00
ExecutionEngine
Linker	GetDLLSuffix: Remove the leading dot from LTDL_SHLIB_EXT.	2010-11-02 20:32:59 +00:00
MC	Do relaxations with FT_Org fragments. Fixes the FIXME:	2010-11-02 21:38:23 +00:00
Support	Print an error as one big string instead of breaking it up.	2010-11-03 00:24:33 +00:00
System	Delete unused variables.	2010-11-03 00:09:12 +00:00
Target	Two sets of changes. Sorry they are intermingled.	2010-11-03 00:45:17 +00:00
Transforms	Let the -inline-threshold command line argument take precedence over the	2010-11-02 23:40:26 +00:00
VMCore	Apply patch for use-after-free in InlineAsm constant handling,	2010-11-02 17:59:27 +00:00
Makefile