mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-26 07:29:55 +00:00
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208750 91177308-0d34-0410-b5e6-96231b3b80d8
178 lines
4.3 KiB
LLVM
178 lines
4.3 KiB
LLVM
; This test makes sure that div instructions are properly eliminated.
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; RUN: opt < %s -instcombine -S | FileCheck %s
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define i32 @test1(i32 %A) {
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%B = sdiv i32 %A, 1 ; <i32> [#uses=1]
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ret i32 %B
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: ret i32 %A
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}
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define i32 @test2(i32 %A) {
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; => Shift
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%B = udiv i32 %A, 8 ; <i32> [#uses=1]
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ret i32 %B
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: lshr i32 %A, 3
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}
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define i32 @test3(i32 %A) {
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; => 0, don't need to keep traps
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%B = sdiv i32 0, %A ; <i32> [#uses=1]
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ret i32 %B
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: ret i32 0
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}
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define i32 @test4(i32 %A) {
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; 0-A
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%B = sdiv i32 %A, -1 ; <i32> [#uses=1]
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ret i32 %B
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: sub i32 0, %A
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}
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define i32 @test5(i32 %A) {
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%B = udiv i32 %A, -16 ; <i32> [#uses=1]
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%C = udiv i32 %B, -4 ; <i32> [#uses=1]
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ret i32 %C
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; CHECK-LABEL: @test5(
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; CHECK-NEXT: ret i32 0
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}
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define i1 @test6(i32 %A) {
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%B = udiv i32 %A, 123 ; <i32> [#uses=1]
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; A < 123
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%C = icmp eq i32 %B, 0 ; <i1> [#uses=1]
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ret i1 %C
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; CHECK-LABEL: @test6(
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; CHECK-NEXT: icmp ult i32 %A, 123
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}
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define i1 @test7(i32 %A) {
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%B = udiv i32 %A, 10 ; <i32> [#uses=1]
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; A >= 20 && A < 30
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%C = icmp eq i32 %B, 2 ; <i1> [#uses=1]
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ret i1 %C
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; CHECK-LABEL: @test7(
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; CHECK-NEXT: add i32 %A, -20
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; CHECK-NEXT: icmp ult i32
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}
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define i1 @test8(i8 %A) {
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%B = udiv i8 %A, 123 ; <i8> [#uses=1]
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; A >= 246
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%C = icmp eq i8 %B, 2 ; <i1> [#uses=1]
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ret i1 %C
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; CHECK-LABEL: @test8(
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; CHECK-NEXT: icmp ugt i8 %A, -11
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}
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define i1 @test9(i8 %A) {
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%B = udiv i8 %A, 123 ; <i8> [#uses=1]
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; A < 246
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%C = icmp ne i8 %B, 2 ; <i1> [#uses=1]
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ret i1 %C
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; CHECK-LABEL: @test9(
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; CHECK-NEXT: icmp ult i8 %A, -10
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}
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define i32 @test10(i32 %X, i1 %C) {
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%V = select i1 %C, i32 64, i32 8 ; <i32> [#uses=1]
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%R = udiv i32 %X, %V ; <i32> [#uses=1]
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ret i32 %R
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; CHECK-LABEL: @test10(
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; CHECK-NEXT: select i1 %C, i32 6, i32 3
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; CHECK-NEXT: lshr i32 %X
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}
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define i32 @test11(i32 %X, i1 %C) {
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%A = select i1 %C, i32 1024, i32 32 ; <i32> [#uses=1]
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%B = udiv i32 %X, %A ; <i32> [#uses=1]
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ret i32 %B
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; CHECK-LABEL: @test11(
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; CHECK-NEXT: select i1 %C, i32 10, i32 5
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; CHECK-NEXT: lshr i32 %X
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}
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; PR2328
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define i32 @test12(i32 %x) nounwind {
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%tmp3 = udiv i32 %x, %x ; 1
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ret i32 %tmp3
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; CHECK-LABEL: @test12(
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; CHECK-NEXT: ret i32 1
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}
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define i32 @test13(i32 %x) nounwind {
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%tmp3 = sdiv i32 %x, %x ; 1
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ret i32 %tmp3
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; CHECK-LABEL: @test13(
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; CHECK-NEXT: ret i32 1
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}
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define i32 @test14(i8 %x) nounwind {
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%zext = zext i8 %x to i32
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%div = udiv i32 %zext, 257 ; 0
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ret i32 %div
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; CHECK-LABEL: @test14(
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; CHECK-NEXT: ret i32 0
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}
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; PR9814
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define i32 @test15(i32 %a, i32 %b) nounwind {
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%shl = shl i32 1, %b
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%div = lshr i32 %shl, 2
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%div2 = udiv i32 %a, %div
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ret i32 %div2
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; CHECK-LABEL: @test15(
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; CHECK-NEXT: add i32 %b, -2
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; CHECK-NEXT: lshr i32 %a,
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; CHECK-NEXT: ret i32
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}
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define <2 x i64> @test16(<2 x i64> %x) nounwind {
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%shr = lshr <2 x i64> %x, <i64 3, i64 5>
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%div = udiv <2 x i64> %shr, <i64 4, i64 6>
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ret <2 x i64> %div
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; CHECK-LABEL: @test16(
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; CHECK-NEXT: udiv <2 x i64> %x, <i64 32, i64 192>
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; CHECK-NEXT: ret <2 x i64>
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}
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define <2 x i64> @test17(<2 x i64> %x) nounwind {
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%neg = sub nsw <2 x i64> zeroinitializer, %x
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%div = sdiv <2 x i64> %neg, <i64 3, i64 4>
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ret <2 x i64> %div
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; CHECK-LABEL: @test17(
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; CHECK-NEXT: sdiv <2 x i64> %x, <i64 -3, i64 -4>
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; CHECK-NEXT: ret <2 x i64>
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}
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define <2 x i64> @test18(<2 x i64> %x) nounwind {
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%div = sdiv <2 x i64> %x, <i64 -1, i64 -1>
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ret <2 x i64> %div
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; CHECK-LABEL: @test18(
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; CHECK-NEXT: sub <2 x i64> zeroinitializer, %x
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; CHECK-NEXT: ret <2 x i64>
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}
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define i32 @test19(i32 %x) {
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%A = udiv i32 1, %x
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ret i32 %A
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; CHECK-LABEL: @test19(
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; CHECK-NEXT: icmp eq i32 %x, 1
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; CHECK-NEXT: zext i1 %{{.*}} to i32
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; CHECK-NEXT ret i32
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}
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define i32 @test20(i32 %x) {
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%A = sdiv i32 1, %x
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ret i32 %A
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; CHECK-LABEL: @test20(
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; CHECK-NEXT: add i32 %x, 1
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; CHECK-NEXT: icmp ult i32 %{{.*}}, 3
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; CHECK-NEXT: select i1 %{{.*}}, i32 %x, i32 {{.*}}
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; CHECK-NEXT: ret i32
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}
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