mirror of
https://github.com/c64scene-ar/llvm-6502.git
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0b8c9a80f2
into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171366 91177308-0d34-0410-b5e6-96231b3b80d8
380 lines
13 KiB
C++
380 lines
13 KiB
C++
// llvm/Target/TargetTransformImpl.cpp - Target Loop Trans Info ---*- C++ -*-=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Target/TargetTransformImpl.h"
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#include "llvm/Target/TargetLowering.h"
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#include <utility>
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using namespace llvm;
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//===----------------------------------------------------------------------===//
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//
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// Calls used by scalar transformations.
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//
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//===----------------------------------------------------------------------===//
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bool ScalarTargetTransformImpl::isLegalAddImmediate(int64_t imm) const {
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return TLI->isLegalAddImmediate(imm);
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}
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bool ScalarTargetTransformImpl::isLegalICmpImmediate(int64_t imm) const {
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return TLI->isLegalICmpImmediate(imm);
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}
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bool ScalarTargetTransformImpl::isLegalAddressingMode(const AddrMode &AM,
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Type *Ty) const {
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return TLI->isLegalAddressingMode(AM, Ty);
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}
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bool ScalarTargetTransformImpl::isTruncateFree(Type *Ty1, Type *Ty2) const {
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return TLI->isTruncateFree(Ty1, Ty2);
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}
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bool ScalarTargetTransformImpl::isTypeLegal(Type *Ty) const {
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EVT T = TLI->getValueType(Ty);
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return TLI->isTypeLegal(T);
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}
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unsigned ScalarTargetTransformImpl::getJumpBufAlignment() const {
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return TLI->getJumpBufAlignment();
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}
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unsigned ScalarTargetTransformImpl::getJumpBufSize() const {
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return TLI->getJumpBufSize();
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}
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bool ScalarTargetTransformImpl::shouldBuildLookupTables() const {
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return TLI->supportJumpTables() &&
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(TLI->isOperationLegalOrCustom(ISD::BR_JT, MVT::Other) ||
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TLI->isOperationLegalOrCustom(ISD::BRIND, MVT::Other));
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}
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//===----------------------------------------------------------------------===//
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//
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// Calls used by the vectorizers.
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//
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//===----------------------------------------------------------------------===//
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int VectorTargetTransformImpl::InstructionOpcodeToISD(unsigned Opcode) const {
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enum InstructionOpcodes {
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#define HANDLE_INST(NUM, OPCODE, CLASS) OPCODE = NUM,
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#define LAST_OTHER_INST(NUM) InstructionOpcodesCount = NUM
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#include "llvm/IR/Instruction.def"
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};
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switch (static_cast<InstructionOpcodes>(Opcode)) {
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case Ret: return 0;
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case Br: return 0;
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case Switch: return 0;
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case IndirectBr: return 0;
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case Invoke: return 0;
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case Resume: return 0;
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case Unreachable: return 0;
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case Add: return ISD::ADD;
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case FAdd: return ISD::FADD;
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case Sub: return ISD::SUB;
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case FSub: return ISD::FSUB;
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case Mul: return ISD::MUL;
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case FMul: return ISD::FMUL;
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case UDiv: return ISD::UDIV;
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case SDiv: return ISD::UDIV;
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case FDiv: return ISD::FDIV;
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case URem: return ISD::UREM;
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case SRem: return ISD::SREM;
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case FRem: return ISD::FREM;
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case Shl: return ISD::SHL;
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case LShr: return ISD::SRL;
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case AShr: return ISD::SRA;
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case And: return ISD::AND;
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case Or: return ISD::OR;
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case Xor: return ISD::XOR;
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case Alloca: return 0;
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case Load: return ISD::LOAD;
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case Store: return ISD::STORE;
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case GetElementPtr: return 0;
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case Fence: return 0;
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case AtomicCmpXchg: return 0;
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case AtomicRMW: return 0;
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case Trunc: return ISD::TRUNCATE;
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case ZExt: return ISD::ZERO_EXTEND;
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case SExt: return ISD::SIGN_EXTEND;
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case FPToUI: return ISD::FP_TO_UINT;
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case FPToSI: return ISD::FP_TO_SINT;
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case UIToFP: return ISD::UINT_TO_FP;
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case SIToFP: return ISD::SINT_TO_FP;
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case FPTrunc: return ISD::FP_ROUND;
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case FPExt: return ISD::FP_EXTEND;
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case PtrToInt: return ISD::BITCAST;
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case IntToPtr: return ISD::BITCAST;
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case BitCast: return ISD::BITCAST;
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case ICmp: return ISD::SETCC;
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case FCmp: return ISD::SETCC;
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case PHI: return 0;
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case Call: return 0;
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case Select: return ISD::SELECT;
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case UserOp1: return 0;
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case UserOp2: return 0;
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case VAArg: return 0;
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case ExtractElement: return ISD::EXTRACT_VECTOR_ELT;
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case InsertElement: return ISD::INSERT_VECTOR_ELT;
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case ShuffleVector: return ISD::VECTOR_SHUFFLE;
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case ExtractValue: return ISD::MERGE_VALUES;
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case InsertValue: return ISD::MERGE_VALUES;
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case LandingPad: return 0;
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}
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llvm_unreachable("Unknown instruction type encountered!");
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}
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std::pair<unsigned, MVT>
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VectorTargetTransformImpl::getTypeLegalizationCost(Type *Ty) const {
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LLVMContext &C = Ty->getContext();
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EVT MTy = TLI->getValueType(Ty);
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unsigned Cost = 1;
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// We keep legalizing the type until we find a legal kind. We assume that
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// the only operation that costs anything is the split. After splitting
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// we need to handle two types.
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while (true) {
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TargetLowering::LegalizeKind LK = TLI->getTypeConversion(C, MTy);
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if (LK.first == TargetLowering::TypeLegal)
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return std::make_pair(Cost, MTy.getSimpleVT());
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if (LK.first == TargetLowering::TypeSplitVector ||
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LK.first == TargetLowering::TypeExpandInteger)
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Cost *= 2;
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// Keep legalizing the type.
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MTy = LK.second;
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}
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}
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unsigned
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VectorTargetTransformImpl::getScalarizationOverhead(Type *Ty,
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bool Insert,
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bool Extract) const {
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assert (Ty->isVectorTy() && "Can only scalarize vectors");
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unsigned Cost = 0;
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for (int i = 0, e = Ty->getVectorNumElements(); i < e; ++i) {
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if (Insert)
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Cost += getVectorInstrCost(Instruction::InsertElement, Ty, i);
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if (Extract)
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Cost += getVectorInstrCost(Instruction::ExtractElement, Ty, i);
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}
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return Cost;
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}
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unsigned VectorTargetTransformImpl::getArithmeticInstrCost(unsigned Opcode,
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Type *Ty) const {
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// Check if any of the operands are vector operands.
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int ISD = InstructionOpcodeToISD(Opcode);
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assert(ISD && "Invalid opcode");
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std::pair<unsigned, MVT> LT = getTypeLegalizationCost(Ty);
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if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
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// The operation is legal. Assume it costs 1.
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// If the type is split to multiple registers, assume that thre is some
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// overhead to this.
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// TODO: Once we have extract/insert subvector cost we need to use them.
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if (LT.first > 1)
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return LT.first * 2;
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return LT.first * 1;
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}
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if (!TLI->isOperationExpand(ISD, LT.second)) {
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// If the operation is custom lowered then assume
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// thare the code is twice as expensive.
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return LT.first * 2;
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}
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// Else, assume that we need to scalarize this op.
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if (Ty->isVectorTy()) {
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unsigned Num = Ty->getVectorNumElements();
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unsigned Cost = getArithmeticInstrCost(Opcode, Ty->getScalarType());
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// return the cost of multiple scalar invocation plus the cost of inserting
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// and extracting the values.
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return getScalarizationOverhead(Ty, true, true) + Num * Cost;
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}
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// We don't know anything about this scalar instruction.
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return 1;
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}
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unsigned VectorTargetTransformImpl::getShuffleCost(ShuffleKind Kind,
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Type *Tp,
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int Index) const {
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return 1;
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}
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unsigned VectorTargetTransformImpl::getCastInstrCost(unsigned Opcode, Type *Dst,
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Type *Src) const {
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int ISD = InstructionOpcodeToISD(Opcode);
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assert(ISD && "Invalid opcode");
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std::pair<unsigned, MVT> SrcLT = getTypeLegalizationCost(Src);
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std::pair<unsigned, MVT> DstLT = getTypeLegalizationCost(Dst);
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// Handle scalar conversions.
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if (!Src->isVectorTy() && !Dst->isVectorTy()) {
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// Scalar bitcasts are usually free.
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if (Opcode == Instruction::BitCast)
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return 0;
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if (Opcode == Instruction::Trunc &&
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TLI->isTruncateFree(SrcLT.second, DstLT.second))
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return 0;
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if (Opcode == Instruction::ZExt &&
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TLI->isZExtFree(SrcLT.second, DstLT.second))
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return 0;
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// Just check the op cost. If the operation is legal then assume it costs 1.
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if (!TLI->isOperationExpand(ISD, DstLT.second))
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return 1;
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// Assume that illegal scalar instruction are expensive.
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return 4;
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}
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// Check vector-to-vector casts.
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if (Dst->isVectorTy() && Src->isVectorTy()) {
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// If the cast is between same-sized registers, then the check is simple.
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if (SrcLT.first == DstLT.first &&
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SrcLT.second.getSizeInBits() == DstLT.second.getSizeInBits()) {
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// Bitcast between types that are legalized to the same type are free.
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if (Opcode == Instruction::BitCast || Opcode == Instruction::Trunc)
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return 0;
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// Assume that Zext is done using AND.
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if (Opcode == Instruction::ZExt)
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return 1;
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// Assume that sext is done using SHL and SRA.
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if (Opcode == Instruction::SExt)
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return 2;
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// Just check the op cost. If the operation is legal then assume it costs
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// 1 and multiply by the type-legalization overhead.
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if (!TLI->isOperationExpand(ISD, DstLT.second))
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return SrcLT.first * 1;
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}
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// If we are converting vectors and the operation is illegal, or
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// if the vectors are legalized to different types, estimate the
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// scalarization costs.
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unsigned Num = Dst->getVectorNumElements();
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unsigned Cost = getCastInstrCost(Opcode, Dst->getScalarType(),
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Src->getScalarType());
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// Return the cost of multiple scalar invocation plus the cost of
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// inserting and extracting the values.
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return getScalarizationOverhead(Dst, true, true) + Num * Cost;
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}
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// We already handled vector-to-vector and scalar-to-scalar conversions. This
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// is where we handle bitcast between vectors and scalars. We need to assume
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// that the conversion is scalarized in one way or another.
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if (Opcode == Instruction::BitCast)
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// Illegal bitcasts are done by storing and loading from a stack slot.
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return (Src->isVectorTy()? getScalarizationOverhead(Src, false, true):0) +
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(Dst->isVectorTy()? getScalarizationOverhead(Dst, true, false):0);
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llvm_unreachable("Unhandled cast");
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}
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unsigned VectorTargetTransformImpl::getCFInstrCost(unsigned Opcode) const {
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// Branches are assumed to be predicted.
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return 0;
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}
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unsigned VectorTargetTransformImpl::getCmpSelInstrCost(unsigned Opcode,
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Type *ValTy,
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Type *CondTy) const {
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int ISD = InstructionOpcodeToISD(Opcode);
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assert(ISD && "Invalid opcode");
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// Selects on vectors are actually vector selects.
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if (ISD == ISD::SELECT) {
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assert(CondTy && "CondTy must exist");
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if (CondTy->isVectorTy())
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ISD = ISD::VSELECT;
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}
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std::pair<unsigned, MVT> LT = getTypeLegalizationCost(ValTy);
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if (!TLI->isOperationExpand(ISD, LT.second)) {
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// The operation is legal. Assume it costs 1. Multiply
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// by the type-legalization overhead.
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return LT.first * 1;
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}
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// Otherwise, assume that the cast is scalarized.
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if (ValTy->isVectorTy()) {
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unsigned Num = ValTy->getVectorNumElements();
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if (CondTy)
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CondTy = CondTy->getScalarType();
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unsigned Cost = getCmpSelInstrCost(Opcode, ValTy->getScalarType(),
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CondTy);
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// Return the cost of multiple scalar invocation plus the cost of inserting
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// and extracting the values.
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return getScalarizationOverhead(ValTy, true, false) + Num * Cost;
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}
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// Unknown scalar opcode.
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return 1;
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}
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unsigned VectorTargetTransformImpl::getVectorInstrCost(unsigned Opcode,
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Type *Val,
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unsigned Index) const {
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return 1;
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}
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unsigned
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VectorTargetTransformImpl::getMemoryOpCost(unsigned Opcode, Type *Src,
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unsigned Alignment,
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unsigned AddressSpace) const {
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assert(!Src->isVoidTy() && "Invalid type");
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std::pair<unsigned, MVT> LT = getTypeLegalizationCost(Src);
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// Assume that all loads of legal types cost 1.
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return LT.first;
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}
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unsigned
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VectorTargetTransformImpl::getIntrinsicInstrCost(Intrinsic::ID, Type *RetTy,
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ArrayRef<Type*> Tys) const {
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// assume that we need to scalarize this intrinsic.
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unsigned ScalarizationCost = 0;
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unsigned ScalarCalls = 1;
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if (RetTy->isVectorTy()) {
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ScalarizationCost = getScalarizationOverhead(RetTy, true, false);
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ScalarCalls = std::max(ScalarCalls, RetTy->getVectorNumElements());
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}
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for (unsigned i = 0, ie = Tys.size(); i != ie; ++i) {
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if (Tys[i]->isVectorTy()) {
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ScalarizationCost += getScalarizationOverhead(Tys[i], false, true);
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ScalarCalls = std::max(ScalarCalls, RetTy->getVectorNumElements());
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}
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}
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return ScalarCalls + ScalarizationCost;
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}
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unsigned
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VectorTargetTransformImpl::getNumberOfParts(Type *Tp) const {
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std::pair<unsigned, MVT> LT = getTypeLegalizationCost(Tp);
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return LT.first;
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}
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