mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-13 21:05:16 +00:00
233a60ec40
This introduces a new pass, SlotIndexes, which is responsible for numbering instructions for register allocation (and other clients). SlotIndexes numbering is designed to match the existing scheme, so this patch should not cause any changes in the generated code. For consistency, and to avoid naming confusion, LiveIndex has been renamed SlotIndex. The processImplicitDefs method of the LiveIntervals analysis has been moved into its own pass so that it can be run prior to SlotIndexes. This was necessary to match the existing numbering scheme. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85979 91177308-0d34-0410-b5e6-96231b3b80d8
64 lines
2.0 KiB
C++
64 lines
2.0 KiB
C++
//===-- LiveStackAnalysis.cpp - Live Stack Slot Analysis ------------------===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// This file implements the live stack slot analysis pass. It is analogous to
|
|
// live interval analysis except it's analyzing liveness of stack slots rather
|
|
// than registers.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#define DEBUG_TYPE "livestacks"
|
|
#include "llvm/CodeGen/LiveStackAnalysis.h"
|
|
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
|
|
#include "llvm/CodeGen/Passes.h"
|
|
#include "llvm/Target/TargetRegisterInfo.h"
|
|
#include "llvm/Support/Debug.h"
|
|
#include "llvm/Support/raw_ostream.h"
|
|
#include "llvm/ADT/Statistic.h"
|
|
#include <limits>
|
|
using namespace llvm;
|
|
|
|
char LiveStacks::ID = 0;
|
|
static RegisterPass<LiveStacks> X("livestacks", "Live Stack Slot Analysis");
|
|
|
|
void LiveStacks::getAnalysisUsage(AnalysisUsage &AU) const {
|
|
AU.setPreservesAll();
|
|
AU.addPreserved<SlotIndexes>();
|
|
AU.addRequiredTransitive<SlotIndexes>();
|
|
MachineFunctionPass::getAnalysisUsage(AU);
|
|
}
|
|
|
|
void LiveStacks::releaseMemory() {
|
|
// Release VNInfo memroy regions after all VNInfo objects are dtor'd.
|
|
VNInfoAllocator.Reset();
|
|
S2IMap.clear();
|
|
S2RCMap.clear();
|
|
}
|
|
|
|
bool LiveStacks::runOnMachineFunction(MachineFunction &) {
|
|
// FIXME: No analysis is being done right now. We are relying on the
|
|
// register allocators to provide the information.
|
|
return false;
|
|
}
|
|
|
|
/// print - Implement the dump method.
|
|
void LiveStacks::print(raw_ostream &OS, const Module*) const {
|
|
|
|
OS << "********** INTERVALS **********\n";
|
|
for (const_iterator I = begin(), E = end(); I != E; ++I) {
|
|
I->second.print(OS);
|
|
int Slot = I->first;
|
|
const TargetRegisterClass *RC = getIntervalRegClass(Slot);
|
|
if (RC)
|
|
OS << " [" << RC->getName() << "]\n";
|
|
else
|
|
OS << " [Unknown]\n";
|
|
}
|
|
}
|