llvm-6502/test/CodeGen
Akira Hatanaka a216401621 MIPS DSP: ADDU.QB instruction sub-class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164754 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 03:13:59 +00:00
..
ARM ARM/atomicrmw_minmax.ll: Fix RUN line. 2012-09-26 10:12:20 +00:00
CellSPU
CPP
Generic
Hexagon LLVM Bug Fix 13709: Remove needless lsr(Rp, #32) instruction access the 2012-09-05 16:01:40 +00:00
MBlaze
Mips MIPS DSP: ADDU.QB instruction sub-class. 2012-09-27 03:13:59 +00:00
MSP430
NVPTX
PowerPC Specify MachinePointerInfo as refering to the argument value and offset of the 2012-09-24 20:47:19 +00:00
SPARC Move load_to_switch.ll to test/CodeGen/SPARC/ 2012-09-19 09:25:03 +00:00
Thumb
Thumb2 Use vld1 / vst2 for unaligned v2f64 load / store. e.g. Use vld1.16 for 2-byte 2012-09-18 01:42:45 +00:00
X86 llvm/test/CodeGen/X86/mulx*.ll: Fix copypasto. 2012-09-26 09:24:12 +00:00
XCore