llvm-6502/2010-04-14-SplitVector.ll at 8387d7db193c2ab1961593487d77cefb550a82c7 - llvm-6502 - Applefritter: Git

6502/llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-17 03:30:28 +00:00

Bob Wilson 164cd8b8d3 Don't custom lower bit converts to ARM VMOVDRRD or VMOVDRR when the operand

does not have a legal type.  The legalizer does not know how to handle those
nodes.  Radar 7854640.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101282 91177308-0d34-0410-b5e6-96231b3b80d8

2010-04-14 20:45:23 +00:00

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 ; RUN: llc < %s -march=arm -mcpu=arm1136jf-s
 ; Radar 7854640
 define arm_apcscc void @test() nounwind {
 bb:
   br i1 undef, label %bb9, label %bb10
 bb9:
   %tmp63 = bitcast <4 x float> zeroinitializer to i128
   %tmp64 = trunc i128 %tmp63 to i32
   br label %bb10
 bb10:
   %0 = phi i32 [ %tmp64, %bb9 ], [ undef, %bb ]
   ret void
 }