llvm-6502/test/CodeGen/Mips/vector-load-store.ll
Akira Hatanaka 7509ec18d1 MIPS DSP: add vector load/store patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164744 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 01:50:59 +00:00

28 lines
603 B
LLVM

; RUN: llc -march=mipsel -mattr=+dsp < %s | FileCheck %s
@g1 = common global <2 x i16> zeroinitializer, align 4
@g0 = common global <2 x i16> zeroinitializer, align 4
@g3 = common global <4 x i8> zeroinitializer, align 4
@g2 = common global <4 x i8> zeroinitializer, align 4
define void @func_v2i16() nounwind {
entry:
; CHECK: lw
; CHECK: sw
%0 = load <2 x i16>* @g1, align 4
store <2 x i16> %0, <2 x i16>* @g0, align 4
ret void
}
define void @func_v4i8() nounwind {
entry:
; CHECK: lw
; CHECK: sw
%0 = load <4 x i8>* @g3, align 4
store <4 x i8> %0, <4 x i8>* @g2, align 4
ret void
}