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8154ef7589
This is very related to the bug fixed in r174431. The problem is that SelectionDAG does not include alignment in the uniquing of loads and stores. When an otherwise no-op DAGCombine would increase the alignment of a load or store, the original node would be returned (with the alignment increased), which would cause the node not to be processed by any further DAGCombines. I don't have a direct testcase for this that manifests on an in-tree target, but I did see some noise in the tests for other targets and have updated them for it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232780 91177308-0d34-0410-b5e6-96231b3b80d8
15 lines
658 B
LLVM
15 lines
658 B
LLVM
; RUN: llc < %s -mtriple=thumbv7-apple-ios | FileCheck %s
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define void @bar(<4 x i32>* %p, i32 %lane, <4 x i32> %phitmp) nounwind {
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; CHECK: lsls r[[ADDR:[0-9]+]], r[[ADDR]], #2
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; CHECK: vst1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[SOURCE:[0-9]+]]:128], r[[ADDR]]
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; CHECK: vld1.32 {[[DREG:d[0-9]+]][], [[DREG2:d[0-9]+]][]}, [r[[SOURCE]]:32]
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; CHECK: vst1.32 {[[DREG]], [[DREG2]]}, [r0]
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%val = extractelement <4 x i32> %phitmp, i32 %lane
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%r1 = insertelement <4 x i32> undef, i32 %val, i32 1
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%r2 = insertelement <4 x i32> %r1, i32 %val, i32 2
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%r3 = insertelement <4 x i32> %r2, i32 %val, i32 3
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store <4 x i32> %r3, <4 x i32>* %p, align 4
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ret void
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}
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