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72062f5744
This patch adds support for AArch64 (ARM's 64-bit architecture) to
LLVM in the "experimental" category. Currently, it won't be built
unless requested explicitly.
This initial commit should have support for:
+ Assembly of all scalar (i.e. non-NEON, non-Crypto) instructions
(except the late addition CRC instructions).
+ CodeGen features required for C++03 and C99.
+ Compilation for the "small" memory model: code+static data <
4GB.
+ Absolute and position-independent code.
+ GNU-style (i.e. "__thread") TLS.
+ Debugging information.
The principal omission, currently, is performance tuning.
This patch excludes the NEON support also reviewed due to an outbreak of
batshit insanity in our legal department. That will be committed soon bringing
the changes to precisely what has been approved.
Further reviews would be gratefully received.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174054 91177308-0d34-0410-b5e6-96231b3b80d8
19 lines
612 B
LLVM
19 lines
612 B
LLVM
; RUN: llc -O0 -mtriple=aarch64-none-linux-gnu -relocation-model=pic -verify-machineinstrs < %s | FileCheck %s
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; If the .tlsdesccall and blr parts are emitted completely separately (even with
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; glue) then LLVM will separate them quite happily (with a spill at O0, hence
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; the option). This is definitely wrong, so we make sure they are emitted
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; together.
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@general_dynamic_var = external thread_local global i32
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define i32 @test_generaldynamic() {
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; CHECK: test_generaldynamic:
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%val = load i32* @general_dynamic_var
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ret i32 %val
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; CHECK: .tlsdesccall general_dynamic_var
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; CHECK-NEXT: blr {{x[0-9]+}}
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}
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