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for the Sparc port. Use the same initializeSubtargetDependencies function to handle initialization similar to the other ports to handle dependencies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211811 91177308-0d34-0410-b5e6-96231b3b80d8
110 lines
3.3 KiB
C++
110 lines
3.3 KiB
C++
//===-- SparcSubtarget.cpp - SPARC Subtarget Information ------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the SPARC specific subclass of TargetSubtargetInfo.
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//
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//===----------------------------------------------------------------------===//
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#include "SparcSubtarget.h"
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#include "Sparc.h"
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Support/TargetRegistry.h"
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using namespace llvm;
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#define DEBUG_TYPE "sparc-subtarget"
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#define GET_SUBTARGETINFO_TARGET_DESC
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#define GET_SUBTARGETINFO_CTOR
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#include "SparcGenSubtargetInfo.inc"
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void SparcSubtarget::anchor() { }
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static std::string computeDataLayout(const SparcSubtarget &ST) {
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// Sparc is big endian.
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std::string Ret = "E-m:e";
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// Some ABIs have 32bit pointers.
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if (!ST.is64Bit())
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Ret += "-p:32:32";
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// Alignments for 64 bit integers.
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Ret += "-i64:64";
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// On SparcV9 128 floats are aligned to 128 bits, on others only to 64.
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// On SparcV9 registers can hold 64 or 32 bits, on others only 32.
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if (ST.is64Bit())
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Ret += "-n32:64";
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else
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Ret += "-f128:64-n32";
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if (ST.is64Bit())
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Ret += "-S128";
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else
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Ret += "-S64";
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return Ret;
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}
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SparcSubtarget &SparcSubtarget::initializeSubtargetDependencies(StringRef CPU,
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StringRef FS) {
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IsV9 = false;
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V8DeprecatedInsts = false;
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IsVIS = false;
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HasHardQuad = false;
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UsePopc = false;
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// Determine default and user specified characteristics
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std::string CPUName = CPU;
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if (CPUName.empty())
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CPUName = (Is64Bit) ? "v9" : "v8";
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// Parse features string.
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ParseSubtargetFeatures(CPUName, FS);
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// Popc is a v9-only instruction.
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if (!IsV9)
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UsePopc = false;
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return *this;
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}
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SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &CPU,
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const std::string &FS, TargetMachine &TM,
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bool is64Bit)
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: SparcGenSubtargetInfo(TT, CPU, FS), Is64Bit(is64Bit),
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DL(computeDataLayout(initializeSubtargetDependencies(CPU, FS))),
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InstrInfo(*this), TLInfo(TM), TSInfo(DL), FrameLowering(*this) {}
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int SparcSubtarget::getAdjustedFrameSize(int frameSize) const {
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if (is64Bit()) {
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// All 64-bit stack frames must be 16-byte aligned, and must reserve space
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// for spilling the 16 window registers at %sp+BIAS..%sp+BIAS+128.
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frameSize += 128;
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// Frames with calls must also reserve space for 6 outgoing arguments
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// whether they are used or not. LowerCall_64 takes care of that.
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assert(frameSize % 16 == 0 && "Stack size not 16-byte aligned");
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} else {
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// Emit the correct save instruction based on the number of bytes in
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// the frame. Minimum stack frame size according to V8 ABI is:
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// 16 words for register window spill
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// 1 word for address of returned aggregate-value
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// + 6 words for passing parameters on the stack
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// ----------
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// 23 words * 4 bytes per word = 92 bytes
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frameSize += 92;
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// Round up to next doubleword boundary -- a double-word boundary
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// is required by the ABI.
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frameSize = RoundUpToAlignment(frameSize, 8);
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}
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return frameSize;
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}
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