mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-14 11:32:34 +00:00
7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
108 lines
5.1 KiB
LLVM
108 lines
5.1 KiB
LLVM
; RUN: llc -O0 -mtriple=x86_64-apple-darwin -filetype=asm %s -o - | FileCheck %s
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; Ensure that we generate an indirect location for the variable length array a.
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; CHECK: ##DEBUG_VALUE: vla:a <- RDX
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; CHECK: DW_OP_breg1
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; rdar://problem/13658587
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;
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; generated from:
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;
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; int vla(int n) {
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; int a[n];
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; a[0] = 42;
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; return a[n-1];
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; }
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;
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; int main(int argc, char** argv) {
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; return vla(argc);
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; }
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; ModuleID = 'vla.c'
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx10.8.0"
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; Function Attrs: nounwind ssp uwtable
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define i32 @vla(i32 %n) nounwind ssp uwtable {
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entry:
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%n.addr = alloca i32, align 4
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%saved_stack = alloca i8*
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%cleanup.dest.slot = alloca i32
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store i32 %n, i32* %n.addr, align 4
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call void @llvm.dbg.declare(metadata i32* %n.addr, metadata !15, metadata !{!"0x102"}), !dbg !16
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%0 = load i32, i32* %n.addr, align 4, !dbg !17
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%1 = zext i32 %0 to i64, !dbg !17
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%2 = call i8* @llvm.stacksave(), !dbg !17
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store i8* %2, i8** %saved_stack, !dbg !17
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%vla = alloca i32, i64 %1, align 16, !dbg !17
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call void @llvm.dbg.declare(metadata i32* %vla, metadata !18, metadata !{!"0x102\006"}), !dbg !17
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%arrayidx = getelementptr inbounds i32, i32* %vla, i64 0, !dbg !22
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store i32 42, i32* %arrayidx, align 4, !dbg !22
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%3 = load i32, i32* %n.addr, align 4, !dbg !23
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%sub = sub nsw i32 %3, 1, !dbg !23
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%idxprom = sext i32 %sub to i64, !dbg !23
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%arrayidx1 = getelementptr inbounds i32, i32* %vla, i64 %idxprom, !dbg !23
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%4 = load i32, i32* %arrayidx1, align 4, !dbg !23
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store i32 1, i32* %cleanup.dest.slot
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%5 = load i8*, i8** %saved_stack, !dbg !24
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call void @llvm.stackrestore(i8* %5), !dbg !24
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ret i32 %4, !dbg !23
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}
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; Function Attrs: nounwind readnone
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declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
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; Function Attrs: nounwind
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declare i8* @llvm.stacksave() nounwind
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; Function Attrs: nounwind
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declare void @llvm.stackrestore(i8*) nounwind
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; Function Attrs: nounwind ssp uwtable
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define i32 @main(i32 %argc, i8** %argv) nounwind ssp uwtable {
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entry:
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%retval = alloca i32, align 4
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%argc.addr = alloca i32, align 4
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%argv.addr = alloca i8**, align 8
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store i32 0, i32* %retval
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store i32 %argc, i32* %argc.addr, align 4
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call void @llvm.dbg.declare(metadata i32* %argc.addr, metadata !25, metadata !{!"0x102"}), !dbg !26
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store i8** %argv, i8*** %argv.addr, align 8
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call void @llvm.dbg.declare(metadata i8*** %argv.addr, metadata !27, metadata !{!"0x102"}), !dbg !26
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%0 = load i32, i32* %argc.addr, align 4, !dbg !28
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%call = call i32 @vla(i32 %0), !dbg !28
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ret i32 %call, !dbg !28
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}
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!29}
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!0 = !{!"0x11\0012\00clang version 3.3 \000\00\000\00\001", !1, !2, !2, !3, !2, !2} ; [ DW_TAG_compile_unit ] [/vla.c] [DW_LANG_C99]
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!1 = !{!"vla.c", !""}
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!2 = !{}
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!3 = !{!4, !9}
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!4 = !{!"0x2e\00vla\00vla\00\001\000\001\000\006\00256\000\001", !1, !5, !6, null, i32 (i32)* @vla, null, null, !2} ; [ DW_TAG_subprogram ] [line 1] [def] [vla]
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!5 = !{!"0x29", !1} ; [ DW_TAG_file_type ] [/vla.c]
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!6 = !{!"0x15\00\000\000\000\000\000\000", i32 0, null, null, !7, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ]
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!7 = !{!8, !8}
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!8 = !{!"0x24\00int\000\0032\0032\000\000\005", null, null} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed]
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!9 = !{!"0x2e\00main\00main\00\007\000\001\000\006\00256\000\007", !1, !5, !10, null, i32 (i32, i8**)* @main, null, null, !2} ; [ DW_TAG_subprogram ] [line 7] [def] [main]
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!10 = !{!"0x15\00\000\000\000\000\000\000", i32 0, null, null, !11, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ]
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!11 = !{!8, !8, !12}
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!12 = !{!"0xf\00\000\0064\0064\000\000", null, null, !13} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from ]
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!13 = !{!"0xf\00\000\0064\0064\000\000", null, null, !14} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from char]
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!14 = !{!"0x24\00char\000\008\008\000\000\006", null, null} ; [ DW_TAG_base_type ] [char] [line 0, size 8, align 8, offset 0, enc DW_ATE_signed_char]
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!15 = !{!"0x101\00n\0016777217\000", !4, !5, !8} ; [ DW_TAG_arg_variable ] [n] [line 1]
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!16 = !MDLocation(line: 1, scope: !4)
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!17 = !MDLocation(line: 2, scope: !4)
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!18 = !{!"0x100\00a\002\000", !4, !5, !19} ; [ DW_TAG_auto_variable ] [a] [line 2]
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!19 = !{!"0x1\00\000\000\0032\000\000", null, null, !8, !20, i32 0, null, null, null} ; [ DW_TAG_array_type ] [line 0, size 0, align 32, offset 0] [from int]
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!20 = !{!21}
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!21 = !{!"0x21\000\00-1"} ; [ DW_TAG_subrange_type ] [unbounded]
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!22 = !MDLocation(line: 3, scope: !4)
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!23 = !MDLocation(line: 4, scope: !4)
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!24 = !MDLocation(line: 5, scope: !4)
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!25 = !{!"0x101\00argc\0016777223\000", !9, !5, !8} ; [ DW_TAG_arg_variable ] [argc] [line 7]
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!26 = !MDLocation(line: 7, scope: !9)
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!27 = !{!"0x101\00argv\0033554439\000", !9, !5, !12} ; [ DW_TAG_arg_variable ] [argv] [line 7]
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!28 = !MDLocation(line: 8, scope: !9)
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!29 = !{i32 1, !"Debug Info Version", i32 2}
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