Johnny Chen 857b1939da Fix the instruction table entries for AI1_adde_sube_s_irs multiclass definition so that ... all the instruction have: let Inst{31-27} = 0b1110; // non-predicated Before, the ARM decoder was confusing: > 0x40 0xf3 0xb8 0x80 as: Opcode=16 Name=ADCSSrs Format=ARM_FORMAT_DPSOREGFRM(5) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- | 1: 0: 0: 0| 0: 0: 0: 0| 1: 0: 1: 1| 1: 0: 0: 0| 1: 1: 1: 1| 0: 0: 1: 1| 0: 1: 0: 0| 0: 0: 0: 0| ------------------------------------------------------------------------------------------------- adcs pc, r8, r0, asr #6 since the cond field for ADCSSrs is a wild card, and so is ADCrs, with the ADCSSrs having Inst{20} as '1'. Now, the AR decoder behaves correctly: > 0x40 0xf3 0xb8 0x80 > END Executing command: /Volumes/data/lldb/llvm/Debug+Asserts/bin/llvm-mc -disassemble -triple=arm-apple-darwin -debug-only=arm-disassembler mc-input.txt Opcode=19 Name=ADCrs Format=ARM_FORMAT_DPSOREGFRM(5) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- | 1: 0: 0: 0| 0: 0: 0: 0| 1: 0: 1: 1| 1: 0: 0: 0| 1: 1: 1: 1| 0: 0: 1: 1| 0: 1: 0: 0| 0: 0: 0: 0| ------------------------------------------------------------------------------------------------- adcshi pc, r8, r0, asr #6 > rdar://problem/9223094 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128746 91177308-0d34-0410-b5e6-96231b3b80d8		2011-04-01 22:32:51 +00:00
..
Analysis	Revert r128140 for now.	2011-03-23 15:51:12 +00:00
Archive
Assembler	Reapply: Add type output to llvm-dis annotations. Patch by Yuri!	2011-03-17 19:50:04 +00:00
Bindings/Ocaml
Bitcode	Add intrinsics @llvm.arm.neon.vmulls and @llvm.arm.neon.vmullu.* back. Frontends	2011-03-29 23:06:19 +00:00
BugPoint
CodeGen	LDRD/STRD instructions should print both Rt and Rt2 in the asm string.	2011-04-01 20:26:57 +00:00
DebugInfo	Move test in x86 specific area.	2011-03-24 22:39:09 +00:00
ExecutionEngine
Feature
FrontendAda	Will not compile without the spec!	2011-03-31 10:03:32 +00:00
FrontendC	Testcase for r128619 (PR9571).	2011-03-31 08:13:57 +00:00
FrontendC++
FrontendFortran
FrontendObjC	Testcase for r127301.	2011-03-09 01:05:00 +00:00
FrontendObjC++
Integer
lib
Linker
LLVMC
MC	Fix the instruction table entries for AI1_adde_sube_s_irs multiclass definition so that	2011-04-01 22:32:51 +00:00
Object
Other
Scripts
TableGen
Transforms	InstCombine: Turn icmp + sext into bitwise/integer ops when the input has only one unknown bit.	2011-04-01 20:09:10 +00:00
Unit
Verifier
CMakeLists.txt
lit.cfg
lit.site.cfg.in
Makefile	Reapply r127073(partially): Introduce $(ECHOPATH) to print DOSish path string on MSYS bash for alternative of $(ECHO).	2011-03-08 12:25:10 +00:00
Makefile.tests
site.exp.in
TestRunner.sh