mirror of
https://github.com/c64scene-ar/llvm-6502.git
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c8e2c5561c
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27133 91177308-0d34-0410-b5e6-96231b3b80d8
766 lines
28 KiB
C++
766 lines
28 KiB
C++
//===-- RegAllocLinearScan.cpp - Linear Scan register allocator -----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements a linear scan register allocator.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "regalloc"
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#include "llvm/CodeGen/LiveIntervalAnalysis.h"
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#include "PhysRegTracker.h"
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#include "VirtRegMap.h"
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#include "llvm/Function.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/SSARegMap.h"
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#include "llvm/Target/MRegisterInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/ADT/EquivalenceClasses.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/Support/Debug.h"
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#include <algorithm>
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#include <cmath>
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#include <iostream>
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#include <set>
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#include <queue>
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#include <memory>
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using namespace llvm;
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namespace {
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Statistic<double> efficiency
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("regalloc", "Ratio of intervals processed over total intervals");
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Statistic<> NumBacktracks("regalloc", "Number of times we had to backtrack");
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static unsigned numIterations = 0;
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static unsigned numIntervals = 0;
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struct RA : public MachineFunctionPass {
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typedef std::pair<LiveInterval*, LiveInterval::iterator> IntervalPtr;
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typedef std::vector<IntervalPtr> IntervalPtrs;
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private:
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/// RelatedRegClasses - This structure is built the first time a function is
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/// compiled, and keeps track of which register classes have registers that
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/// belong to multiple classes or have aliases that are in other classes.
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EquivalenceClasses<const TargetRegisterClass*> RelatedRegClasses;
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std::map<unsigned, const TargetRegisterClass*> OneClassForEachPhysReg;
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MachineFunction* mf_;
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const TargetMachine* tm_;
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const MRegisterInfo* mri_;
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LiveIntervals* li_;
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bool *PhysRegsUsed;
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/// handled_ - Intervals are added to the handled_ set in the order of their
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/// start value. This is uses for backtracking.
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std::vector<LiveInterval*> handled_;
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/// fixed_ - Intervals that correspond to machine registers.
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///
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IntervalPtrs fixed_;
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/// active_ - Intervals that are currently being processed, and which have a
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/// live range active for the current point.
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IntervalPtrs active_;
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/// inactive_ - Intervals that are currently being processed, but which have
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/// a hold at the current point.
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IntervalPtrs inactive_;
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typedef std::priority_queue<LiveInterval*,
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std::vector<LiveInterval*>,
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greater_ptr<LiveInterval> > IntervalHeap;
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IntervalHeap unhandled_;
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std::auto_ptr<PhysRegTracker> prt_;
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std::auto_ptr<VirtRegMap> vrm_;
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std::auto_ptr<Spiller> spiller_;
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public:
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virtual const char* getPassName() const {
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return "Linear Scan Register Allocator";
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}
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequired<LiveIntervals>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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/// runOnMachineFunction - register allocate the whole function
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bool runOnMachineFunction(MachineFunction&);
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private:
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/// linearScan - the linear scan algorithm
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void linearScan();
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/// initIntervalSets - initialize the interval sets.
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///
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void initIntervalSets();
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/// processActiveIntervals - expire old intervals and move non-overlapping
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/// ones to the inactive list.
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void processActiveIntervals(unsigned CurPoint);
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/// processInactiveIntervals - expire old intervals and move overlapping
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/// ones to the active list.
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void processInactiveIntervals(unsigned CurPoint);
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/// assignRegOrStackSlotAtInterval - assign a register if one
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/// is available, or spill.
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void assignRegOrStackSlotAtInterval(LiveInterval* cur);
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///
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/// register handling helpers
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///
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/// getFreePhysReg - return a free physical register for this virtual
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/// register interval if we have one, otherwise return 0.
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unsigned getFreePhysReg(LiveInterval* cur);
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/// assignVirt2StackSlot - assigns this virtual register to a
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/// stack slot. returns the stack slot
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int assignVirt2StackSlot(unsigned virtReg);
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void ComputeRelatedRegClasses();
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template <typename ItTy>
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void printIntervals(const char* const str, ItTy i, ItTy e) const {
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if (str) std::cerr << str << " intervals:\n";
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for (; i != e; ++i) {
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std::cerr << "\t" << *i->first << " -> ";
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unsigned reg = i->first->reg;
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if (MRegisterInfo::isVirtualRegister(reg)) {
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reg = vrm_->getPhys(reg);
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}
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std::cerr << mri_->getName(reg) << '\n';
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}
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}
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};
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}
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void RA::ComputeRelatedRegClasses() {
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const MRegisterInfo &MRI = *mri_;
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// First pass, add all reg classes to the union, and determine at least one
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// reg class that each register is in.
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bool HasAliases = false;
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for (MRegisterInfo::regclass_iterator RCI = MRI.regclass_begin(),
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E = MRI.regclass_end(); RCI != E; ++RCI) {
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RelatedRegClasses.insert(*RCI);
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for (TargetRegisterClass::iterator I = (*RCI)->begin(), E = (*RCI)->end();
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I != E; ++I) {
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HasAliases = HasAliases || *MRI.getAliasSet(*I) != 0;
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const TargetRegisterClass *&PRC = OneClassForEachPhysReg[*I];
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if (PRC) {
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// Already processed this register. Just make sure we know that
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// multiple register classes share a register.
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RelatedRegClasses.unionSets(PRC, *RCI);
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} else {
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PRC = *RCI;
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}
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}
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}
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// Second pass, now that we know conservatively what register classes each reg
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// belongs to, add info about aliases. We don't need to do this for targets
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// without register aliases.
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if (HasAliases)
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for (std::map<unsigned, const TargetRegisterClass*>::iterator
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I = OneClassForEachPhysReg.begin(), E = OneClassForEachPhysReg.end();
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I != E; ++I)
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for (const unsigned *AS = MRI.getAliasSet(I->first); *AS; ++AS)
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RelatedRegClasses.unionSets(I->second, OneClassForEachPhysReg[*AS]);
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}
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bool RA::runOnMachineFunction(MachineFunction &fn) {
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mf_ = &fn;
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tm_ = &fn.getTarget();
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mri_ = tm_->getRegisterInfo();
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li_ = &getAnalysis<LiveIntervals>();
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// If this is the first function compiled, compute the related reg classes.
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if (RelatedRegClasses.empty())
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ComputeRelatedRegClasses();
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PhysRegsUsed = new bool[mri_->getNumRegs()];
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std::fill(PhysRegsUsed, PhysRegsUsed+mri_->getNumRegs(), false);
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fn.setUsedPhysRegs(PhysRegsUsed);
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if (!prt_.get()) prt_.reset(new PhysRegTracker(*mri_));
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vrm_.reset(new VirtRegMap(*mf_));
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if (!spiller_.get()) spiller_.reset(createSpiller());
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initIntervalSets();
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linearScan();
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// Rewrite spill code and update the PhysRegsUsed set.
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spiller_->runOnMachineFunction(*mf_, *vrm_);
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vrm_.reset(); // Free the VirtRegMap
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while (!unhandled_.empty()) unhandled_.pop();
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fixed_.clear();
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active_.clear();
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inactive_.clear();
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handled_.clear();
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return true;
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}
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/// initIntervalSets - initialize the interval sets.
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///
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void RA::initIntervalSets()
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{
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assert(unhandled_.empty() && fixed_.empty() &&
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active_.empty() && inactive_.empty() &&
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"interval sets should be empty on initialization");
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for (LiveIntervals::iterator i = li_->begin(), e = li_->end(); i != e; ++i) {
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if (MRegisterInfo::isPhysicalRegister(i->second.reg)) {
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PhysRegsUsed[i->second.reg] = true;
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fixed_.push_back(std::make_pair(&i->second, i->second.begin()));
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} else
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unhandled_.push(&i->second);
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}
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}
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void RA::linearScan()
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{
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// linear scan algorithm
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DEBUG(std::cerr << "********** LINEAR SCAN **********\n");
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DEBUG(std::cerr << "********** Function: "
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<< mf_->getFunction()->getName() << '\n');
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// DEBUG(printIntervals("unhandled", unhandled_.begin(), unhandled_.end()));
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DEBUG(printIntervals("fixed", fixed_.begin(), fixed_.end()));
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DEBUG(printIntervals("active", active_.begin(), active_.end()));
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DEBUG(printIntervals("inactive", inactive_.begin(), inactive_.end()));
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while (!unhandled_.empty()) {
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// pick the interval with the earliest start point
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LiveInterval* cur = unhandled_.top();
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unhandled_.pop();
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++numIterations;
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DEBUG(std::cerr << "\n*** CURRENT ***: " << *cur << '\n');
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processActiveIntervals(cur->beginNumber());
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processInactiveIntervals(cur->beginNumber());
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assert(MRegisterInfo::isVirtualRegister(cur->reg) &&
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"Can only allocate virtual registers!");
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// Allocating a virtual register. try to find a free
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// physical register or spill an interval (possibly this one) in order to
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// assign it one.
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assignRegOrStackSlotAtInterval(cur);
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DEBUG(printIntervals("active", active_.begin(), active_.end()));
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DEBUG(printIntervals("inactive", inactive_.begin(), inactive_.end()));
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}
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numIntervals += li_->getNumIntervals();
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efficiency = double(numIterations) / double(numIntervals);
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// expire any remaining active intervals
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for (IntervalPtrs::reverse_iterator
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i = active_.rbegin(); i != active_.rend(); ) {
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unsigned reg = i->first->reg;
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DEBUG(std::cerr << "\tinterval " << *i->first << " expired\n");
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assert(MRegisterInfo::isVirtualRegister(reg) &&
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"Can only allocate virtual registers!");
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reg = vrm_->getPhys(reg);
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prt_->delRegUse(reg);
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i = IntervalPtrs::reverse_iterator(active_.erase(i.base()-1));
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}
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// expire any remaining inactive intervals
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for (IntervalPtrs::reverse_iterator
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i = inactive_.rbegin(); i != inactive_.rend(); ) {
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DEBUG(std::cerr << "\tinterval " << *i->first << " expired\n");
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i = IntervalPtrs::reverse_iterator(inactive_.erase(i.base()-1));
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}
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DEBUG(std::cerr << *vrm_);
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}
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/// processActiveIntervals - expire old intervals and move non-overlapping ones
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/// to the inactive list.
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void RA::processActiveIntervals(unsigned CurPoint)
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{
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DEBUG(std::cerr << "\tprocessing active intervals:\n");
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for (unsigned i = 0, e = active_.size(); i != e; ++i) {
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LiveInterval *Interval = active_[i].first;
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LiveInterval::iterator IntervalPos = active_[i].second;
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unsigned reg = Interval->reg;
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IntervalPos = Interval->advanceTo(IntervalPos, CurPoint);
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if (IntervalPos == Interval->end()) { // Remove expired intervals.
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DEBUG(std::cerr << "\t\tinterval " << *Interval << " expired\n");
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assert(MRegisterInfo::isVirtualRegister(reg) &&
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"Can only allocate virtual registers!");
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reg = vrm_->getPhys(reg);
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prt_->delRegUse(reg);
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// Pop off the end of the list.
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active_[i] = active_.back();
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active_.pop_back();
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--i; --e;
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} else if (IntervalPos->start > CurPoint) {
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// Move inactive intervals to inactive list.
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DEBUG(std::cerr << "\t\tinterval " << *Interval << " inactive\n");
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assert(MRegisterInfo::isVirtualRegister(reg) &&
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"Can only allocate virtual registers!");
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reg = vrm_->getPhys(reg);
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prt_->delRegUse(reg);
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// add to inactive.
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inactive_.push_back(std::make_pair(Interval, IntervalPos));
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// Pop off the end of the list.
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active_[i] = active_.back();
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active_.pop_back();
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--i; --e;
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} else {
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// Otherwise, just update the iterator position.
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active_[i].second = IntervalPos;
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}
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}
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}
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/// processInactiveIntervals - expire old intervals and move overlapping
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/// ones to the active list.
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void RA::processInactiveIntervals(unsigned CurPoint)
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{
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DEBUG(std::cerr << "\tprocessing inactive intervals:\n");
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for (unsigned i = 0, e = inactive_.size(); i != e; ++i) {
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LiveInterval *Interval = inactive_[i].first;
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LiveInterval::iterator IntervalPos = inactive_[i].second;
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unsigned reg = Interval->reg;
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IntervalPos = Interval->advanceTo(IntervalPos, CurPoint);
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if (IntervalPos == Interval->end()) { // remove expired intervals.
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DEBUG(std::cerr << "\t\tinterval " << *Interval << " expired\n");
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// Pop off the end of the list.
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inactive_[i] = inactive_.back();
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inactive_.pop_back();
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--i; --e;
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} else if (IntervalPos->start <= CurPoint) {
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// move re-activated intervals in active list
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DEBUG(std::cerr << "\t\tinterval " << *Interval << " active\n");
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assert(MRegisterInfo::isVirtualRegister(reg) &&
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"Can only allocate virtual registers!");
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reg = vrm_->getPhys(reg);
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prt_->addRegUse(reg);
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// add to active
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active_.push_back(std::make_pair(Interval, IntervalPos));
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// Pop off the end of the list.
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inactive_[i] = inactive_.back();
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inactive_.pop_back();
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--i; --e;
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} else {
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// Otherwise, just update the iterator position.
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inactive_[i].second = IntervalPos;
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}
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}
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}
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/// updateSpillWeights - updates the spill weights of the specifed physical
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/// register and its weight.
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static void updateSpillWeights(std::vector<float> &Weights,
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unsigned reg, float weight,
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const MRegisterInfo *MRI) {
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Weights[reg] += weight;
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for (const unsigned* as = MRI->getAliasSet(reg); *as; ++as)
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Weights[*as] += weight;
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}
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static RA::IntervalPtrs::iterator FindIntervalInVector(RA::IntervalPtrs &IP,
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LiveInterval *LI) {
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for (RA::IntervalPtrs::iterator I = IP.begin(), E = IP.end(); I != E; ++I)
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if (I->first == LI) return I;
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return IP.end();
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}
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static void RevertVectorIteratorsTo(RA::IntervalPtrs &V, unsigned Point) {
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for (unsigned i = 0, e = V.size(); i != e; ++i) {
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RA::IntervalPtr &IP = V[i];
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LiveInterval::iterator I = std::upper_bound(IP.first->begin(),
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IP.second, Point);
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if (I != IP.first->begin()) --I;
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IP.second = I;
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}
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}
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/// assignRegOrStackSlotAtInterval - assign a register if one is available, or
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/// spill.
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void RA::assignRegOrStackSlotAtInterval(LiveInterval* cur)
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{
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DEBUG(std::cerr << "\tallocating current interval: ");
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PhysRegTracker backupPrt = *prt_;
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std::vector<std::pair<unsigned, float> > SpillWeightsToAdd;
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unsigned StartPosition = cur->beginNumber();
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const TargetRegisterClass *RC = mf_->getSSARegMap()->getRegClass(cur->reg);
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const TargetRegisterClass *RCLeader = RelatedRegClasses.getLeaderValue(RC);
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// for every interval in inactive we overlap with, mark the
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// register as not free and update spill weights.
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for (IntervalPtrs::const_iterator i = inactive_.begin(),
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e = inactive_.end(); i != e; ++i) {
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unsigned Reg = i->first->reg;
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assert(MRegisterInfo::isVirtualRegister(Reg) &&
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"Can only allocate virtual registers!");
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const TargetRegisterClass *RegRC = mf_->getSSARegMap()->getRegClass(Reg);
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// If this is not in a related reg class to the register we're allocating,
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// don't check it.
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if (RelatedRegClasses.getLeaderValue(RegRC) == RCLeader &&
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cur->overlapsFrom(*i->first, i->second-1)) {
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Reg = vrm_->getPhys(Reg);
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prt_->addRegUse(Reg);
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SpillWeightsToAdd.push_back(std::make_pair(Reg, i->first->weight));
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}
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}
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// Speculatively check to see if we can get a register right now. If not,
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// we know we won't be able to by adding more constraints. If so, we can
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// check to see if it is valid. Doing an exhaustive search of the fixed_ list
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// is very bad (it contains all callee clobbered registers for any functions
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// with a call), so we want to avoid doing that if possible.
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unsigned physReg = getFreePhysReg(cur);
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if (physReg) {
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// We got a register. However, if it's in the fixed_ list, we might
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// conflict with it. Check to see if we conflict with it or any of its
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// aliases.
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std::set<unsigned> RegAliases;
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for (const unsigned *AS = mri_->getAliasSet(physReg); *AS; ++AS)
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RegAliases.insert(*AS);
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bool ConflictsWithFixed = false;
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for (unsigned i = 0, e = fixed_.size(); i != e; ++i) {
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if (physReg == fixed_[i].first->reg ||
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RegAliases.count(fixed_[i].first->reg)) {
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// Okay, this reg is on the fixed list. Check to see if we actually
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// conflict.
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IntervalPtr &IP = fixed_[i];
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LiveInterval *I = IP.first;
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if (I->endNumber() > StartPosition) {
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LiveInterval::iterator II = I->advanceTo(IP.second, StartPosition);
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IP.second = II;
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if (II != I->begin() && II->start > StartPosition)
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--II;
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if (cur->overlapsFrom(*I, II)) {
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ConflictsWithFixed = true;
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break;
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}
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}
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}
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}
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// Okay, the register picked by our speculative getFreePhysReg call turned
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// out to be in use. Actually add all of the conflicting fixed registers to
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// prt so we can do an accurate query.
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if (ConflictsWithFixed) {
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// For every interval in fixed we overlap with, mark the register as not
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// free and update spill weights.
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for (unsigned i = 0, e = fixed_.size(); i != e; ++i) {
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IntervalPtr &IP = fixed_[i];
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LiveInterval *I = IP.first;
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const TargetRegisterClass *RegRC = OneClassForEachPhysReg[I->reg];
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if (RelatedRegClasses.getLeaderValue(RegRC) == RCLeader &&
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|
I->endNumber() > StartPosition) {
|
|
LiveInterval::iterator II = I->advanceTo(IP.second, StartPosition);
|
|
IP.second = II;
|
|
if (II != I->begin() && II->start > StartPosition)
|
|
--II;
|
|
if (cur->overlapsFrom(*I, II)) {
|
|
unsigned reg = I->reg;
|
|
prt_->addRegUse(reg);
|
|
SpillWeightsToAdd.push_back(std::make_pair(reg, I->weight));
|
|
}
|
|
}
|
|
}
|
|
|
|
// Using the newly updated prt_ object, which includes conflicts in the
|
|
// future, see if there are any registers available.
|
|
physReg = getFreePhysReg(cur);
|
|
}
|
|
}
|
|
|
|
// Restore the physical register tracker, removing information about the
|
|
// future.
|
|
*prt_ = backupPrt;
|
|
|
|
// if we find a free register, we are done: assign this virtual to
|
|
// the free physical register and add this interval to the active
|
|
// list.
|
|
if (physReg) {
|
|
DEBUG(std::cerr << mri_->getName(physReg) << '\n');
|
|
vrm_->assignVirt2Phys(cur->reg, physReg);
|
|
prt_->addRegUse(physReg);
|
|
active_.push_back(std::make_pair(cur, cur->begin()));
|
|
handled_.push_back(cur);
|
|
return;
|
|
}
|
|
DEBUG(std::cerr << "no free registers\n");
|
|
|
|
// Compile the spill weights into an array that is better for scanning.
|
|
std::vector<float> SpillWeights(mri_->getNumRegs(), 0.0);
|
|
for (std::vector<std::pair<unsigned, float> >::iterator
|
|
I = SpillWeightsToAdd.begin(), E = SpillWeightsToAdd.end(); I != E; ++I)
|
|
updateSpillWeights(SpillWeights, I->first, I->second, mri_);
|
|
|
|
// for each interval in active, update spill weights.
|
|
for (IntervalPtrs::const_iterator i = active_.begin(), e = active_.end();
|
|
i != e; ++i) {
|
|
unsigned reg = i->first->reg;
|
|
assert(MRegisterInfo::isVirtualRegister(reg) &&
|
|
"Can only allocate virtual registers!");
|
|
reg = vrm_->getPhys(reg);
|
|
updateSpillWeights(SpillWeights, reg, i->first->weight, mri_);
|
|
}
|
|
|
|
DEBUG(std::cerr << "\tassigning stack slot at interval "<< *cur << ":\n");
|
|
|
|
// Find a register to spill.
|
|
float minWeight = float(HUGE_VAL);
|
|
unsigned minReg = 0;
|
|
for (TargetRegisterClass::iterator i = RC->allocation_order_begin(*mf_),
|
|
e = RC->allocation_order_end(*mf_); i != e; ++i) {
|
|
unsigned reg = *i;
|
|
if (minWeight > SpillWeights[reg]) {
|
|
minWeight = SpillWeights[reg];
|
|
minReg = reg;
|
|
}
|
|
}
|
|
|
|
// If we didn't find a register that is spillable, try aliases?
|
|
|
|
// FIXME: assert(minReg && "Didn't find any reg!");
|
|
DEBUG(std::cerr << "\t\tregister with min weight: "
|
|
<< mri_->getName(minReg) << " (" << minWeight << ")\n");
|
|
|
|
// if the current has the minimum weight, we need to spill it and
|
|
// add any added intervals back to unhandled, and restart
|
|
// linearscan.
|
|
if (cur->weight <= minWeight) {
|
|
DEBUG(std::cerr << "\t\t\tspilling(c): " << *cur << '\n';);
|
|
int slot = vrm_->assignVirt2StackSlot(cur->reg);
|
|
std::vector<LiveInterval*> added =
|
|
li_->addIntervalsForSpills(*cur, *vrm_, slot);
|
|
if (added.empty())
|
|
return; // Early exit if all spills were folded.
|
|
|
|
// Merge added with unhandled. Note that we know that
|
|
// addIntervalsForSpills returns intervals sorted by their starting
|
|
// point.
|
|
for (unsigned i = 0, e = added.size(); i != e; ++i)
|
|
unhandled_.push(added[i]);
|
|
return;
|
|
}
|
|
|
|
++NumBacktracks;
|
|
|
|
// push the current interval back to unhandled since we are going
|
|
// to re-run at least this iteration. Since we didn't modify it it
|
|
// should go back right in the front of the list
|
|
unhandled_.push(cur);
|
|
|
|
// otherwise we spill all intervals aliasing the register with
|
|
// minimum weight, rollback to the interval with the earliest
|
|
// start point and let the linear scan algorithm run again
|
|
std::vector<LiveInterval*> added;
|
|
assert(MRegisterInfo::isPhysicalRegister(minReg) &&
|
|
"did not choose a register to spill?");
|
|
std::vector<bool> toSpill(mri_->getNumRegs(), false);
|
|
|
|
// We are going to spill minReg and all its aliases.
|
|
toSpill[minReg] = true;
|
|
for (const unsigned* as = mri_->getAliasSet(minReg); *as; ++as)
|
|
toSpill[*as] = true;
|
|
|
|
// the earliest start of a spilled interval indicates up to where
|
|
// in handled we need to roll back
|
|
unsigned earliestStart = cur->beginNumber();
|
|
|
|
// set of spilled vregs (used later to rollback properly)
|
|
std::set<unsigned> spilled;
|
|
|
|
// spill live intervals of virtual regs mapped to the physical register we
|
|
// want to clear (and its aliases). We only spill those that overlap with the
|
|
// current interval as the rest do not affect its allocation. we also keep
|
|
// track of the earliest start of all spilled live intervals since this will
|
|
// mark our rollback point.
|
|
for (IntervalPtrs::iterator i = active_.begin(); i != active_.end(); ++i) {
|
|
unsigned reg = i->first->reg;
|
|
if (//MRegisterInfo::isVirtualRegister(reg) &&
|
|
toSpill[vrm_->getPhys(reg)] &&
|
|
cur->overlapsFrom(*i->first, i->second)) {
|
|
DEBUG(std::cerr << "\t\t\tspilling(a): " << *i->first << '\n');
|
|
earliestStart = std::min(earliestStart, i->first->beginNumber());
|
|
int slot = vrm_->assignVirt2StackSlot(i->first->reg);
|
|
std::vector<LiveInterval*> newIs =
|
|
li_->addIntervalsForSpills(*i->first, *vrm_, slot);
|
|
std::copy(newIs.begin(), newIs.end(), std::back_inserter(added));
|
|
spilled.insert(reg);
|
|
}
|
|
}
|
|
for (IntervalPtrs::iterator i = inactive_.begin(); i != inactive_.end(); ++i){
|
|
unsigned reg = i->first->reg;
|
|
if (//MRegisterInfo::isVirtualRegister(reg) &&
|
|
toSpill[vrm_->getPhys(reg)] &&
|
|
cur->overlapsFrom(*i->first, i->second-1)) {
|
|
DEBUG(std::cerr << "\t\t\tspilling(i): " << *i->first << '\n');
|
|
earliestStart = std::min(earliestStart, i->first->beginNumber());
|
|
int slot = vrm_->assignVirt2StackSlot(reg);
|
|
std::vector<LiveInterval*> newIs =
|
|
li_->addIntervalsForSpills(*i->first, *vrm_, slot);
|
|
std::copy(newIs.begin(), newIs.end(), std::back_inserter(added));
|
|
spilled.insert(reg);
|
|
}
|
|
}
|
|
|
|
DEBUG(std::cerr << "\t\trolling back to: " << earliestStart << '\n');
|
|
|
|
// Scan handled in reverse order up to the earliest start of a
|
|
// spilled live interval and undo each one, restoring the state of
|
|
// unhandled.
|
|
while (!handled_.empty()) {
|
|
LiveInterval* i = handled_.back();
|
|
// If this interval starts before t we are done.
|
|
if (i->beginNumber() < earliestStart)
|
|
break;
|
|
DEBUG(std::cerr << "\t\t\tundo changes for: " << *i << '\n');
|
|
handled_.pop_back();
|
|
|
|
// When undoing a live interval allocation we must know if it is active or
|
|
// inactive to properly update the PhysRegTracker and the VirtRegMap.
|
|
IntervalPtrs::iterator it;
|
|
if ((it = FindIntervalInVector(active_, i)) != active_.end()) {
|
|
active_.erase(it);
|
|
assert(!MRegisterInfo::isPhysicalRegister(i->reg));
|
|
if (!spilled.count(i->reg))
|
|
unhandled_.push(i);
|
|
prt_->delRegUse(vrm_->getPhys(i->reg));
|
|
vrm_->clearVirt(i->reg);
|
|
} else if ((it = FindIntervalInVector(inactive_, i)) != inactive_.end()) {
|
|
inactive_.erase(it);
|
|
assert(!MRegisterInfo::isPhysicalRegister(i->reg));
|
|
if (!spilled.count(i->reg))
|
|
unhandled_.push(i);
|
|
vrm_->clearVirt(i->reg);
|
|
} else {
|
|
assert(MRegisterInfo::isVirtualRegister(i->reg) &&
|
|
"Can only allocate virtual registers!");
|
|
vrm_->clearVirt(i->reg);
|
|
unhandled_.push(i);
|
|
}
|
|
}
|
|
|
|
// Rewind the iterators in the active, inactive, and fixed lists back to the
|
|
// point we reverted to.
|
|
RevertVectorIteratorsTo(active_, earliestStart);
|
|
RevertVectorIteratorsTo(inactive_, earliestStart);
|
|
RevertVectorIteratorsTo(fixed_, earliestStart);
|
|
|
|
// scan the rest and undo each interval that expired after t and
|
|
// insert it in active (the next iteration of the algorithm will
|
|
// put it in inactive if required)
|
|
for (unsigned i = 0, e = handled_.size(); i != e; ++i) {
|
|
LiveInterval *HI = handled_[i];
|
|
if (!HI->expiredAt(earliestStart) &&
|
|
HI->expiredAt(cur->beginNumber())) {
|
|
DEBUG(std::cerr << "\t\t\tundo changes for: " << *HI << '\n');
|
|
active_.push_back(std::make_pair(HI, HI->begin()));
|
|
assert(!MRegisterInfo::isPhysicalRegister(HI->reg));
|
|
prt_->addRegUse(vrm_->getPhys(HI->reg));
|
|
}
|
|
}
|
|
|
|
// merge added with unhandled
|
|
for (unsigned i = 0, e = added.size(); i != e; ++i)
|
|
unhandled_.push(added[i]);
|
|
}
|
|
|
|
/// getFreePhysReg - return a free physical register for this virtual register
|
|
/// interval if we have one, otherwise return 0.
|
|
unsigned RA::getFreePhysReg(LiveInterval *cur) {
|
|
std::vector<unsigned> inactiveCounts(mri_->getNumRegs(), 0);
|
|
unsigned MaxInactiveCount = 0;
|
|
|
|
const TargetRegisterClass *RC = mf_->getSSARegMap()->getRegClass(cur->reg);
|
|
const TargetRegisterClass *RCLeader = RelatedRegClasses.getLeaderValue(RC);
|
|
|
|
for (IntervalPtrs::iterator i = inactive_.begin(), e = inactive_.end();
|
|
i != e; ++i) {
|
|
unsigned reg = i->first->reg;
|
|
assert(MRegisterInfo::isVirtualRegister(reg) &&
|
|
"Can only allocate virtual registers!");
|
|
|
|
// If this is not in a related reg class to the register we're allocating,
|
|
// don't check it.
|
|
const TargetRegisterClass *RegRC = mf_->getSSARegMap()->getRegClass(reg);
|
|
if (RelatedRegClasses.getLeaderValue(RegRC) == RCLeader) {
|
|
reg = vrm_->getPhys(reg);
|
|
++inactiveCounts[reg];
|
|
MaxInactiveCount = std::max(MaxInactiveCount, inactiveCounts[reg]);
|
|
}
|
|
}
|
|
|
|
const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg);
|
|
|
|
unsigned FreeReg = 0;
|
|
unsigned FreeRegInactiveCount = 0;
|
|
|
|
// Scan for the first available register.
|
|
TargetRegisterClass::iterator I = rc->allocation_order_begin(*mf_);
|
|
TargetRegisterClass::iterator E = rc->allocation_order_end(*mf_);
|
|
for (; I != E; ++I)
|
|
if (prt_->isRegAvail(*I)) {
|
|
FreeReg = *I;
|
|
FreeRegInactiveCount = inactiveCounts[FreeReg];
|
|
break;
|
|
}
|
|
|
|
// If there are no free regs, or if this reg has the max inactive count,
|
|
// return this register.
|
|
if (FreeReg == 0 || FreeRegInactiveCount == MaxInactiveCount) return FreeReg;
|
|
|
|
// Continue scanning the registers, looking for the one with the highest
|
|
// inactive count. Alkis found that this reduced register pressure very
|
|
// slightly on X86 (in rev 1.94 of this file), though this should probably be
|
|
// reevaluated now.
|
|
for (; I != E; ++I) {
|
|
unsigned Reg = *I;
|
|
if (prt_->isRegAvail(Reg) && FreeRegInactiveCount < inactiveCounts[Reg]) {
|
|
FreeReg = Reg;
|
|
FreeRegInactiveCount = inactiveCounts[Reg];
|
|
if (FreeRegInactiveCount == MaxInactiveCount)
|
|
break; // We found the one with the max inactive count.
|
|
}
|
|
}
|
|
|
|
return FreeReg;
|
|
}
|
|
|
|
FunctionPass* llvm::createLinearScanRegisterAllocator() {
|
|
return new RA();
|
|
}
|