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https://github.com/c64scene-ar/llvm-6502.git
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5c8b83eb7a
The logic for expanding atomics that aren't natively supported in terms of cmpxchg loops is much simpler to express at the IR level. It also allows the normal optimisations and CodeGen improvements to help out with atomics, instead of using a limited set of possible instructions.. rdar://problem/13496295 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212119 91177308-0d34-0410-b5e6-96231b3b80d8
20 lines
460 B
LLVM
20 lines
460 B
LLVM
; RUN: llc < %s -mcpu=corei7 -march=x86 -verify-machineinstrs | FileCheck %s
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; 64-bit load/store on x86-32
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; FIXME: The generated code can be substantially improved.
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define void @test1(i64* %ptr, i64 %val1) {
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; CHECK: test1
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; CHECK: cmpxchg8b
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; CHECK-NEXT: jne
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store atomic i64 %val1, i64* %ptr seq_cst, align 8
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ret void
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}
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define i64 @test2(i64* %ptr) {
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; CHECK: test2
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; CHECK: cmpxchg8b
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%val = load atomic i64* %ptr seq_cst, align 8
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ret i64 %val
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}
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