mirror of
https://github.com/c64scene-ar/llvm-6502.git
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19e39c6f12
Canonicalize shuffles according to rules: * shuffle(A, shuffle(A, B)) -> shuffle(shuffle(A,B), A) * shuffle(B, shuffle(A, B)) -> shuffle(shuffle(A,B), B) * shuffle(B, shuffle(A, Undef)) -> shuffle(shuffle(A, Undef), B) This patch helps identifying more shuffle pairs that could be combined reusing the already existing rules in the DAGCombiner. Added new test 'combine-vec-shuffle-5.ll' to verify that the canonicalized shuffles are now folded into a single shuffle node by the DAGCombiner. Added more test cases to 'combine-vec-shuffle-4.ll'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213504 91177308-0d34-0410-b5e6-96231b3b80d8
238 lines
7.6 KiB
LLVM
238 lines
7.6 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s
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; Verify that we fold shuffles according to rule:
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; (shuffle(shuffle A, Undef, M0), B, M1) -> (shuffle A, B, M2)
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define <4 x float> @test1(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 4, i32 2, i32 3, i32 1>
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%2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 1, i32 2>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test1
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; Mask: [4,5,2,3]
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; CHECK: movsd
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; CHECK: ret
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define <4 x float> @test2(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 6, i32 0, i32 1, i32 7>
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%2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 1, i32 2, i32 4, i32 5>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test2
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; Mask: [0,1,4,5]
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; CHECK: movlhps
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; CHECK: ret
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define <4 x float> @test3(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 5, i32 1, i32 7>
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%2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 1>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test3
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; Mask: [0,1,4,u]
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; CHECK: movlhps
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; CHECK: ret
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define <4 x float> @test4(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 5, i32 5>
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%2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test4
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; Mask: [6,7,2,3]
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; CHECK: movhlps
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; CHECK-NEXT: ret
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define <4 x float> @test5(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 3>
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%2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 0, i32 2, i32 6, i32 7>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test5
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; Mask: [0,1,6,7]
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; CHECK: blendps $12
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; CHECK: ret
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; Verify that we fold shuffles according to rule:
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; (shuffle(shuffle A, Undef, M0), A, M1) -> (shuffle A, Undef, M2)
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define <4 x float> @test6(<4 x float> %a) {
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%1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 4, i32 2, i32 3, i32 1>
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%2 = shufflevector <4 x float> %1, <4 x float> %a, <4 x i32> <i32 4, i32 5, i32 1, i32 2>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test6
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; Mask: [0,1,2,3]
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; CHECK-NOT: pshufd
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; CHECK-NOT: shufps
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; CHECK-NOT: movlhps
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; CHECK: ret
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define <4 x float> @test7(<4 x float> %a) {
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%1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 6, i32 0, i32 1, i32 7>
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%2 = shufflevector <4 x float> %1, <4 x float> %a, <4 x i32> <i32 1, i32 2, i32 4, i32 5>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test7
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; Mask: [0,1,0,1]
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; CHECK-NOT: pshufd
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; CHECK-NOT: shufps
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; CHECK: movlhps
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; CHECK-NEXT: ret
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define <4 x float> @test8(<4 x float> %a) {
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%1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 5, i32 1, i32 7>
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%2 = shufflevector <4 x float> %1, <4 x float> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 1>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test8
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; Mask: [0,1,0,u]
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; CHECK-NOT: pshufd
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; CHECK-NOT: shufps
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; CHECK: movlhps
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; CHECK-NEXT: ret
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define <4 x float> @test9(<4 x float> %a) {
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%1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 5, i32 5>
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%2 = shufflevector <4 x float> %1, <4 x float> %a, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test9
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; Mask: [2,3,2,3]
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; CHECK-NOT: movlhps
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; CHECK-NOT: palignr
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; CHECK: movhlps
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; CHECK-NEXT: ret
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define <4 x float> @test10(<4 x float> %a) {
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%1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 3>
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%2 = shufflevector <4 x float> %1, <4 x float> %a, <4 x i32> <i32 0, i32 2, i32 6, i32 7>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test10
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; Mask: [0,1,2,3]
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; CHECK-NOT: pshufd
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; CHECK-NOT: shufps
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; CHECK-NOT: movlhps
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; CHECK: ret
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define <4 x float> @test11(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 4, i32 2, i32 3, i32 1>
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%2 = shufflevector <4 x float> %b, <4 x float> %1, <4 x i32> <i32 0, i32 1, i32 5, i32 6>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test11
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; Mask: [4,5,2,3]
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; CHECK: movsd
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; CHECK: ret
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define <4 x float> @test12(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 6, i32 0, i32 1, i32 7>
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%2 = shufflevector <4 x float> %b, <4 x float> %1, <4 x i32> <i32 5, i32 6, i32 0, i32 1>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test12
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; Mask: [0,1,4,5]
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; CHECK: movlhps
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; CHECK: ret
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define <4 x float> @test13(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 5, i32 1, i32 7>
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%2 = shufflevector <4 x float> %b, <4 x float> %1, <4 x i32> <i32 4, i32 5, i32 0, i32 5>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test13
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; Mask: [0,1,4,u]
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; CHECK: movlhps
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; CHECK: ret
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define <4 x float> @test14(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 5, i32 5>
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%2 = shufflevector <4 x float> %b, <4 x float> %1, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test14
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; Mask: [6,7,2,3]
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; CHECK: movhlps
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; CHECK-NEXT: ret
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define <4 x float> @test15(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 3>
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%2 = shufflevector <4 x float> %b, <4 x float> %1, <4 x i32> <i32 4, i32 6, i32 2, i32 3>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test15
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; Mask: [0,1,6,7]
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; CHECK: blendps $12
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; CHECK: ret
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; Verify that shuffles are canonicalized according to rules:
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; shuffle(B, shuffle(A, Undef)) -> shuffle(shuffle(A, Undef), B)
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;
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; This allows to trigger the following combine rule:
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; (shuffle(shuffle A, Undef, M0), A, M1) -> (shuffle A, Undef, M2)
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;
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; As a result, all the shuffle pairs in each function below should be
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; combined into a single legal shuffle operation.
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define <4 x float> @test16(<4 x float> %a) {
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%1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 4, i32 2, i32 3, i32 1>
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%2 = shufflevector <4 x float> %a, <4 x float> %1, <4 x i32> <i32 0, i32 1, i32 5, i32 3>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test16
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; Mask: [0,1,2,3]
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; CHECK-NOT: pshufd
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; CHECK-NOT: shufps
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; CHECK-NOT: movlhps
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; CHECK: ret
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define <4 x float> @test17(<4 x float> %a) {
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%1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 6, i32 0, i32 1, i32 7>
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%2 = shufflevector <4 x float> %a, <4 x float> %1, <4 x i32> <i32 5, i32 6, i32 0, i32 1>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test17
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; Mask: [0,1,0,1]
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; CHECK-NOT: pshufd
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; CHECK-NOT: shufps
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; CHECK: movlhps
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; CHECK-NEXT: ret
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define <4 x float> @test18(<4 x float> %a) {
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%1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 5, i32 1, i32 7>
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%2 = shufflevector <4 x float> %a, <4 x float> %1, <4 x i32> <i32 4, i32 6, i32 0, i32 5>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test18
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; Mask: [0,1,0,u]
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; CHECK-NOT: pshufd
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; CHECK-NOT: shufps
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; CHECK: movlhps
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; CHECK-NEXT: ret
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define <4 x float> @test19(<4 x float> %a) {
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%1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 5, i32 5>
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%2 = shufflevector <4 x float> %a, <4 x float> %1, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test19
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; Mask: [2,3,2,3]
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; CHECK-NOT: movlhps
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; CHECK-NOT: palignr
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; CHECK: movhlps
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; CHECK-NEXT: ret
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define <4 x float> @test20(<4 x float> %a) {
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%1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 3>
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%2 = shufflevector <4 x float> %a, <4 x float> %1, <4 x i32> <i32 4, i32 6, i32 2, i32 3>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test20
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; Mask: [0,1,2,3]
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; CHECK-NOT: pshufd
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; CHECK-NOT: shufps
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; CHECK-NOT: movlhps
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; CHECK: ret
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