mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-22 09:29:31 +00:00
306030f8aa
Stop using ST registers for function returns and inline-asm instructions and use FP registers instead. This allows removing a large amount of code in the stackifier pass that was needed to track register liveness and handle copies between ST and FP registers and function calls returning floating point values. It also fixes a bug which manifests when an ST register defined by an inline-asm instruction was live across another inline-asm instruction, as shown in the following sequence of machine instructions: 1. INLINEASM <es:frndint> $0:[regdef], %ST0<imp-def,tied5> 2. INLINEASM <es:fldcw $0> 3. %FP0<def> = COPY %ST0 <rdar://problem/16952634> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214580 91177308-0d34-0410-b5e6-96231b3b80d8
405 lines
12 KiB
LLVM
405 lines
12 KiB
LLVM
; RUN: llc < %s -mcpu=generic -mtriple=i386-apple-darwin -no-integrated-as | FileCheck %s
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; There should be no stack manipulations between the inline asm and ret.
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; CHECK: test1
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; CHECK: InlineAsm End
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; CHECK-NEXT: ret
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define x86_fp80 @test1() {
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%tmp85 = call x86_fp80 asm sideeffect "fld0", "={st(0)}"()
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ret x86_fp80 %tmp85
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}
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; CHECK: test2
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; CHECK: InlineAsm End
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; CHECK-NEXT: ret
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define double @test2() {
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%tmp85 = call double asm sideeffect "fld0", "={st(0)}"()
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ret double %tmp85
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}
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; Setting up argument in st(0) should be a single fld.
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; CHECK: test3
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; CHECK: fld
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; CHECK-NEXT: InlineAsm Start
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; Asm consumes stack, nothing should be popped.
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; CHECK: InlineAsm End
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; CHECK-NOT: fstp
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; CHECK: ret
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define void @test3(x86_fp80 %X) {
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call void asm sideeffect "frob ", "{st(0)},~{st},~{dirflag},~{fpsr},~{flags}"( x86_fp80 %X)
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ret void
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}
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; CHECK: test4
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; CHECK: fld
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; CHECK-NEXT: InlineAsm Start
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; CHECK: InlineAsm End
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; CHECK-NOT: fstp
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; CHECK: ret
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define void @test4(double %X) {
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call void asm sideeffect "frob ", "{st(0)},~{st},~{dirflag},~{fpsr},~{flags}"( double %X)
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ret void
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}
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; Same as test3/4, but using value from fadd.
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; The fadd can be done in xmm or x87 regs - we don't test that.
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; CHECK: test5
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; CHECK: InlineAsm End
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; CHECK-NOT: fstp
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; CHECK: ret
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define void @test5(double %X) {
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%Y = fadd double %X, 123.0
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call void asm sideeffect "frob ", "{st(0)},~{st},~{dirflag},~{fpsr},~{flags}"( double %Y)
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ret void
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}
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; CHECK: test6
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define void @test6(double %A, double %B, double %C,
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double %D, double %E) nounwind {
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entry:
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; Uses the same value twice, should have one fstp after the asm.
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; CHECK: foo
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; CHECK: InlineAsm End
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; CHECK-NEXT: fstp
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; CHECK-NOT: fstp
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tail call void asm sideeffect "foo $0 $1", "f,f,~{dirflag},~{fpsr},~{flags}"( double %A, double %A ) nounwind
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; Uses two different values, should be in st(0)/st(1) and both be popped.
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; CHECK: bar
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; CHECK: InlineAsm End
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; CHECK-NEXT: fstp
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; CHECK-NEXT: fstp
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tail call void asm sideeffect "bar $0 $1", "f,f,~{dirflag},~{fpsr},~{flags}"( double %B, double %C ) nounwind
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; Uses two different values, one of which isn't killed in this asm, it
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; should not be popped after the asm.
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; CHECK: baz
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; CHECK: InlineAsm End
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; CHECK-NEXT: fstp
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; CHECK-NOT: fstp
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tail call void asm sideeffect "baz $0 $1", "f,f,~{dirflag},~{fpsr},~{flags}"( double %D, double %E ) nounwind
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; This is the last use of %D, so it should be popped after.
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; CHECK: baz
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; CHECK: InlineAsm End
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; CHECK-NEXT: fstp
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; CHECK-NOT: fstp
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; CHECK: ret
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tail call void asm sideeffect "baz $0", "f,~{dirflag},~{fpsr},~{flags}"( double %D ) nounwind
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ret void
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}
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; PR4185
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; Passing a non-killed value to asm in {st}.
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; Make sure it is duped before.
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; asm kills st(0), so we shouldn't pop anything
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; CHECK: testPR4185
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; CHECK: fld %st(0)
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; CHECK: fistpl
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; CHECK-NOT: fstp
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; CHECK: fistpl
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; CHECK-NOT: fstp
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; CHECK: ret
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; A valid alternative would be to remat the constant pool load before each
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; inline asm.
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define void @testPR4185() {
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return:
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call void asm sideeffect "fistpl $0", "{st},~{st}"(double 1.000000e+06)
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call void asm sideeffect "fistpl $0", "{st},~{st}"(double 1.000000e+06)
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ret void
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}
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; Passing a non-killed value through asm in {st}.
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; Make sure it is not duped before.
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; Second asm kills st(0), so we shouldn't pop anything
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; CHECK: testPR4185b
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; CHECK-NOT: fld %st(0)
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; CHECK: fistl
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; CHECK-NOT: fstp
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; CHECK: fistpl
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; CHECK-NOT: fstp
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; CHECK: ret
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; A valid alternative would be to remat the constant pool load before each
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; inline asm.
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define void @testPR4185b() {
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return:
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call void asm sideeffect "fistl $0", "{st}"(double 1.000000e+06)
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call void asm sideeffect "fistpl $0", "{st},~{st}"(double 1.000000e+06)
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ret void
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}
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; PR4459
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; The return value from ceil must be duped before being consumed by asm.
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; CHECK: testPR4459
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; CHECK: ceil
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; CHECK: fld %st(0)
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; CHECK-NOT: fxch
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; CHECK: fistpl
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; CHECK-NOT: fxch
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; CHECK: fstpt
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; CHECK: test
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define void @testPR4459(x86_fp80 %a) {
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entry:
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%0 = call x86_fp80 @ceil(x86_fp80 %a)
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call void asm sideeffect "fistpl $0", "{st},~{st}"( x86_fp80 %0)
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call void @test3(x86_fp80 %0 )
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ret void
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}
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declare x86_fp80 @ceil(x86_fp80)
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; PR4484
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; test1 leaves a value on the stack that is needed after the asm.
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; CHECK: testPR4484
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; CHECK: calll _test1
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; CHECK-NOT: fstp
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; Load %a from stack after ceil
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; CHECK: fldt
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; CHECK-NOT: fxch
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; CHECK: fistpl
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; CHECK-NOT: fstp
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; Set up call to test.
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; CHECK: fstpt
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; CHECK: test
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define void @testPR4484(x86_fp80 %a) {
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entry:
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%0 = call x86_fp80 @test1()
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call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %a)
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call void @test3(x86_fp80 %0)
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ret void
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}
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; PR4485
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; CHECK: testPR4485
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define void @testPR4485(x86_fp80* %a) {
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entry:
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%0 = load x86_fp80* %a, align 16
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%1 = fmul x86_fp80 %0, 0xK4006B400000000000000
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%2 = fmul x86_fp80 %1, 0xK4012F424000000000000
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tail call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %2)
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%3 = load x86_fp80* %a, align 16
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%4 = fmul x86_fp80 %3, 0xK4006B400000000000000
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%5 = fmul x86_fp80 %4, 0xK4012F424000000000000
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tail call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %5)
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ret void
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}
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; An input argument in a fixed position is implicitly popped by the asm only if
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; the input argument is tied to an output register, or it is in the clobber list.
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; The clobber list case is tested above.
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;
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; This doesn't implicitly pop the stack:
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;
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; void fist1(long double x, int *p) {
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; asm volatile ("fistl %1" : : "t"(x), "m"(*p));
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; }
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;
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; CHECK: fist1
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; CHECK: fldt
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; CHECK: fistl (%e
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; CHECK: fstp
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; CHECK: ret
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define void @fist1(x86_fp80 %x, i32* %p) nounwind ssp {
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entry:
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tail call void asm sideeffect "fistl $1", "{st},*m,~{memory},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %x, i32* %p) nounwind
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ret void
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}
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; Here, the input operand is tied to an output which means that is is
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; implicitly popped (and then the output is implicitly pushed).
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;
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; long double fist2(long double x, int *p) {
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; long double y;
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; asm ("fistl %1" : "=&t"(y) : "0"(x), "m"(*p) : "memory");
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; return y;
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; }
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;
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; CHECK: fist2
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; CHECK: fldt
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; CHECK: fistl (%e
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; CHECK-NOT: fstp
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; CHECK: ret
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define x86_fp80 @fist2(x86_fp80 %x, i32* %p) nounwind ssp {
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entry:
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%0 = tail call x86_fp80 asm "fistl $2", "=&{st},0,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %x, i32* %p) nounwind
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ret x86_fp80 %0
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}
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; An 'f' constraint is never implicitly popped:
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;
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; void fucomp1(long double x, long double y) {
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; asm volatile ("fucomp %1" : : "t"(x), "f"(y) : "st");
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; }
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; CHECK: fucomp1
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; CHECK: fldt
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; CHECK: fldt
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; CHECK: fucomp %st
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; CHECK: fstp
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; CHECK-NOT: fstp
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; CHECK: ret
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define void @fucomp1(x86_fp80 %x, x86_fp80 %y) nounwind ssp {
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entry:
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tail call void asm sideeffect "fucomp $1", "{st},f,~{st},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %x, x86_fp80 %y) nounwind
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ret void
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}
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; The 'u' constraint is only popped implicitly when clobbered:
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;
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; void fucomp2(long double x, long double y) {
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; asm volatile ("fucomp %1" : : "t"(x), "u"(y) : "st");
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; }
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;
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; void fucomp3(long double x, long double y) {
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; asm volatile ("fucompp %1" : : "t"(x), "u"(y) : "st", "st(1)");
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; }
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;
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; CHECK: fucomp2
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; CHECK: fldt
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; CHECK: fldt
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; CHECK: fucomp %st(1)
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; CHECK: fstp
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; CHECK-NOT: fstp
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; CHECK: ret
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;
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; CHECK: fucomp3
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; CHECK: fldt
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; CHECK: fldt
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; CHECK: fucompp %st(1)
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; CHECK-NOT: fstp
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; CHECK: ret
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define void @fucomp2(x86_fp80 %x, x86_fp80 %y) nounwind ssp {
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entry:
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tail call void asm sideeffect "fucomp $1", "{st},{st(1)},~{st},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %x, x86_fp80 %y) nounwind
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ret void
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}
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define void @fucomp3(x86_fp80 %x, x86_fp80 %y) nounwind ssp {
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entry:
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tail call void asm sideeffect "fucompp $1", "{st},{st(1)},~{st},~{st(1)},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %x, x86_fp80 %y) nounwind
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ret void
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}
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; One input, two outputs, one dead output.
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%complex = type { float, float }
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; CHECK: sincos1
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; CHECK: flds
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; CHECK-NOT: fxch
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; CHECK: sincos
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; CHECK-NOT: fstp
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; CHECK: fstp %st(1)
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; CHECK-NOT: fstp
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; CHECK: ret
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define float @sincos1(float %x) nounwind ssp {
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entry:
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%0 = tail call %complex asm "sincos", "={st},={st(1)},0,~{dirflag},~{fpsr},~{flags}"(float %x) nounwind
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%asmresult = extractvalue %complex %0, 0
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ret float %asmresult
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}
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; Same thing, swapped output operands.
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; CHECK: sincos2
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; CHECK: flds
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; CHECK-NOT: fxch
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; CHECK: sincos
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; CHECK-NOT: fstp
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; CHECK: fstp %st(1)
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; CHECK-NOT: fstp
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; CHECK: ret
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define float @sincos2(float %x) nounwind ssp {
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entry:
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%0 = tail call %complex asm "sincos", "={st(1)},={st},1,~{dirflag},~{fpsr},~{flags}"(float %x) nounwind
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%asmresult = extractvalue %complex %0, 1
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ret float %asmresult
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}
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; Clobber st(0) after it was live-out/dead from the previous asm.
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; CHECK: sincos3
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; Load x, make a copy for the second asm.
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; CHECK: flds
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; CHECK: fld %st(0)
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; CHECK: sincos
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; Discard dead result in st(0), bring x to the top.
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; CHECK: fstp %st(0)
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; CHECK: fxch
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; x is now in st(0) for the second asm
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; CHECK: sincos
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; Discard both results.
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; CHECK: fstp
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; CHECK: fstp
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; CHECK: ret
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define float @sincos3(float %x) nounwind ssp {
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entry:
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%0 = tail call %complex asm sideeffect "sincos", "={st(1)},={st},1,~{dirflag},~{fpsr},~{flags}"(float %x) nounwind
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%1 = tail call %complex asm sideeffect "sincos", "={st(1)},={st},1,~{dirflag},~{fpsr},~{flags}"(float %x) nounwind
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%asmresult = extractvalue %complex %0, 0
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ret float %asmresult
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}
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; Pass the same value in two fixed stack slots.
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; CHECK: PR10602
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; CHECK: flds LCPI
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; CHECK: fld %st(0)
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; CHECK: fcomi %st(1), %st(0)
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define i32 @PR10602() nounwind ssp {
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entry:
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%0 = tail call i32 asm "fcomi $2, $1; pushf; pop $0", "=r,{st},{st(1)},~{dirflag},~{fpsr},~{flags}"(double 2.000000e+00, double 2.000000e+00) nounwind
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ret i32 %0
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}
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; <rdar://problem/16952634>
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; X87 stackifier asserted when there was an ST register defined by an
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; inline-asm instruction and the ST register was live across another
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; inline-asm instruction.
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;
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; INLINEASM <es:frndint> [sideeffect] [attdialect], $0:[regdef], %ST0<imp-def,tied5>, $1:[reguse tiedto:$0], %ST0<tied3>, $2:[clobber], %EFLAGS<earlyclobber,imp-def,dead>
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; INLINEASM <es:fldcw $0> [sideeffect] [mayload] [attdialect], $0:[mem], %EAX<undef>, 1, %noreg, 0, %noreg, $1:[clobber], %EFLAGS<earlyclobber,imp-def,dead>
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; %FP0<def> = COPY %ST0
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; CHECK-LABEL: _test_live_st
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; CHECK: ## InlineAsm Start
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; CHECK: frndint
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; CHECK: ## InlineAsm End
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; CHECK: ## InlineAsm Start
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; CHECK: fldcw
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; CHECK: ## InlineAsm End
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%struct.fpu_t = type { [8 x x86_fp80], x86_fp80, %struct.anon1, %struct.anon2, i32, i8, [15 x i8] }
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%struct.anon1 = type { i32, i32, i32 }
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%struct.anon2 = type { i32, i32, i32, i32 }
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@fpu = external global %struct.fpu_t, align 16
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; Function Attrs: ssp
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define void @test_live_st(i32 %a1) {
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entry:
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%0 = load x86_fp80* undef, align 16
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%cond = icmp eq i32 %a1, 1
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br i1 %cond, label %sw.bb4.i, label %_Z5tointRKe.exit
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sw.bb4.i:
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%1 = call x86_fp80 asm sideeffect "frndint", "={st},0,~{dirflag},~{fpsr},~{flags}"(x86_fp80 %0)
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call void asm sideeffect "fldcw $0", "*m,~{dirflag},~{fpsr},~{flags}"(i32* undef)
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br label %_Z5tointRKe.exit
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_Z5tointRKe.exit:
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%result.0.i = phi x86_fp80 [ %1, %sw.bb4.i ], [ %0, %entry ]
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%conv.i1814 = fptosi x86_fp80 %result.0.i to i32
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%conv626 = sitofp i32 %conv.i1814 to x86_fp80
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store x86_fp80 %conv626, x86_fp80* getelementptr inbounds (%struct.fpu_t* @fpu, i32 0, i32 1)
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br label %return
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return:
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ret void
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}
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; Check that x87 stackifier is correctly rewriting FP registers to ST registers.
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;
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; CHECK-LABEL: _test_operand_rewrite
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; CHECK: ## InlineAsm Start
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; CHECK: foo %st(0), %st(1)
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; CHECK: ## InlineAsm End
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define double @test_operand_rewrite() {
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entry:
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%0 = tail call { double, double } asm sideeffect "foo $0, $1", "={st},={st(1)},~{dirflag},~{fpsr},~{flags}"()
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%asmresult = extractvalue { double, double } %0, 0
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%asmresult1 = extractvalue { double, double } %0, 1
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%sub = fsub double %asmresult, %asmresult1
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ret double %sub
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}
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