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https://github.com/c64scene-ar/llvm-6502.git
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f8909fa140
Summary: This helps the instruction selector to lower an i64 * i64 -> i128 multiplication into a single instruction on targets which support it. This is an update of D2973 which was reverted because of a bug reported as PR19084. Reviewers: t.p.northover, chapuni Reviewed By: t.p.northover CC: llvm-commits, alex, chapuni Differential Revision: http://llvm-reviews.chandlerc.com/D3021 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203797 91177308-0d34-0410-b5e6-96231b3b80d8
33 lines
1.0 KiB
LLVM
33 lines
1.0 KiB
LLVM
; RUN: llc < %s -march=x86-64 | FileCheck %s
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define void @test(i64* nocapture %arr, i64 %arrsize, i64 %factor) nounwind uwtable {
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%1 = icmp sgt i64 %arrsize, 0
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br i1 %1, label %.lr.ph, label %._crit_edge
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.lr.ph: ; preds = %0
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%2 = sext i64 %factor to i128
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br label %3
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; <label>:3 ; preds = %3, %.lr.ph
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; CHECK-NOT: mul
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; CHECK: imulq
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; CHECK-NOT: mul
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%carry.02 = phi i128 [ 0, %.lr.ph ], [ %10, %3 ]
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%i.01 = phi i64 [ 0, %.lr.ph ], [ %11, %3 ]
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%4 = getelementptr inbounds i64* %arr, i64 %i.01
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%5 = load i64* %4, align 8
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%6 = sext i64 %5 to i128
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%7 = mul nsw i128 %6, %2
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%8 = add nsw i128 %7, %carry.02
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%.tr = trunc i128 %8 to i64
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%9 = and i64 %.tr, 9223372036854775807
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store i64 %9, i64* %4, align 8
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%10 = ashr i128 %8, 63
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%11 = add nsw i64 %i.01, 1
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%exitcond = icmp eq i64 %11, %arrsize
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br i1 %exitcond, label %._crit_edge, label %3
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._crit_edge: ; preds = %3, %0
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ret void
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}
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