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8c20ec54d9
Limit the folding of any_ext and sext into the load operation to scalars. Limit the active-bits trunc optimization to scalars. Document vector trunc and vector sext in LangRef. Similar to commit 126080 (for enabling zext). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126424 91177308-0d34-0410-b5e6-96231b3b80d8
78 lines
1.9 KiB
LLVM
78 lines
1.9 KiB
LLVM
; RUN: llc < %s -march=x86-64
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; PR 9267
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define<4 x i16> @func_16_32() {
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%F = load <4 x i32>* undef
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%G = trunc <4 x i32> %F to <4 x i16>
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%H = load <4 x i32>* undef
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%Y = trunc <4 x i32> %H to <4 x i16>
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%T = add <4 x i16> %Y, %G
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store <4 x i16>%T , <4 x i16>* undef
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ret <4 x i16> %T
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}
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define<4 x i16> @func_16_64() {
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%F = load <4 x i64>* undef
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%G = trunc <4 x i64> %F to <4 x i16>
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%H = load <4 x i64>* undef
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%Y = trunc <4 x i64> %H to <4 x i16>
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%T = xor <4 x i16> %Y, %G
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store <4 x i16>%T , <4 x i16>* undef
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ret <4 x i16> %T
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}
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define<4 x i32> @func_32_64() {
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%F = load <4 x i64>* undef
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%G = trunc <4 x i64> %F to <4 x i32>
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%H = load <4 x i64>* undef
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%Y = trunc <4 x i64> %H to <4 x i32>
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%T = or <4 x i32> %Y, %G
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ret <4 x i32> %T
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}
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define<4 x i8> @func_8_16() {
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%F = load <4 x i16>* undef
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%G = trunc <4 x i16> %F to <4 x i8>
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%H = load <4 x i16>* undef
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%Y = trunc <4 x i16> %H to <4 x i8>
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%T = add <4 x i8> %Y, %G
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ret <4 x i8> %T
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}
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define<4 x i8> @func_8_32() {
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%F = load <4 x i32>* undef
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%G = trunc <4 x i32> %F to <4 x i8>
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%H = load <4 x i32>* undef
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%Y = trunc <4 x i32> %H to <4 x i8>
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%T = sub <4 x i8> %Y, %G
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ret <4 x i8> %T
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}
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define<4 x i8> @func_8_64() {
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%F = load <4 x i64>* undef
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%G = trunc <4 x i64> %F to <4 x i8>
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%H = load <4 x i64>* undef
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%Y = trunc <4 x i64> %H to <4 x i8>
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%T = add <4 x i8> %Y, %G
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ret <4 x i8> %T
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}
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define<4 x i16> @const_16_32() {
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%G = trunc <4 x i32> <i32 0, i32 3, i32 8, i32 7> to <4 x i16>
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ret <4 x i16> %G
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}
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define<4 x i16> @const_16_64() {
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%G = trunc <4 x i64> <i64 0, i64 3, i64 8, i64 7> to <4 x i16>
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ret <4 x i16> %G
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}
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define void @bugOnTruncBitwidthReduce() nounwind {
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meh:
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%0 = xor <4 x i64> zeroinitializer, zeroinitializer
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%1 = trunc <4 x i64> %0 to <4 x i32>
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%2 = lshr <4 x i32> %1, <i32 18, i32 18, i32 18, i32 18>
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%3 = xor <4 x i32> %2, %1
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ret void
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}
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