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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46588 91177308-0d34-0410-b5e6-96231b3b80d8
297 lines
12 KiB
C++
297 lines
12 KiB
C++
//===-- llvm/CodeGen/LiveVariables.h - Live Variable Analysis ---*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the LiveVariables analysis pass. For each machine
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// instruction in the function, this pass calculates the set of registers that
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// are immediately dead after the instruction (i.e., the instruction calculates
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// the value, but it is never used) and the set of registers that are used by
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// the instruction, but are never used after the instruction (i.e., they are
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// killed).
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//
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// This class computes live variables using a sparse implementation based on
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// the machine code SSA form. This class computes live variable information for
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// each virtual and _register allocatable_ physical register in a function. It
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// uses the dominance properties of SSA form to efficiently compute live
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// variables for virtual registers, and assumes that physical registers are only
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// live within a single basic block (allowing it to do a single local analysis
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// to resolve physical register lifetimes in each basic block). If a physical
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// register is not register allocatable, it is not tracked. This is useful for
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// things like the stack pointer and condition codes.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_LIVEVARIABLES_H
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#define LLVM_CODEGEN_LIVEVARIABLES_H
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/ADT/BitVector.h"
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#include "llvm/ADT/SmallSet.h"
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#include "llvm/ADT/SmallVector.h"
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#include <map>
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namespace llvm {
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class MRegisterInfo;
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class LiveVariables : public MachineFunctionPass {
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public:
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static char ID; // Pass identification, replacement for typeid
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LiveVariables() : MachineFunctionPass((intptr_t)&ID) {}
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/// VarInfo - This represents the regions where a virtual register is live in
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/// the program. We represent this with three different pieces of
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/// information: the instruction that uniquely defines the value, the set of
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/// blocks the instruction is live into and live out of, and the set of
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/// non-phi instructions that are the last users of the value.
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///
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/// In the common case where a value is defined and killed in the same block,
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/// DefInst is the defining inst, there is one killing instruction, and
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/// AliveBlocks is empty.
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///
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/// Otherwise, the value is live out of the block. If the value is live
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/// across any blocks, these blocks are listed in AliveBlocks. Blocks where
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/// the liveness range ends are not included in AliveBlocks, instead being
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/// captured by the Kills set. In these blocks, the value is live into the
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/// block (unless the value is defined and killed in the same block) and lives
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/// until the specified instruction. Note that there cannot ever be a value
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/// whose Kills set contains two instructions from the same basic block.
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///
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/// PHI nodes complicate things a bit. If a PHI node is the last user of a
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/// value in one of its predecessor blocks, it is not listed in the kills set,
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/// but does include the predecessor block in the AliveBlocks set (unless that
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/// block also defines the value). This leads to the (perfectly sensical)
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/// situation where a value is defined in a block, and the last use is a phi
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/// node in the successor. In this case, DefInst will be the defining
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/// instruction, AliveBlocks is empty (the value is not live across any
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/// blocks) and Kills is empty (phi nodes are not included). This is sensical
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/// because the value must be live to the end of the block, but is not live in
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/// any successor blocks.
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struct VarInfo {
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/// DefInst - The machine instruction that defines this register.
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///
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MachineInstr *DefInst;
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/// AliveBlocks - Set of blocks of which this value is alive completely
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/// through. This is a bit set which uses the basic block number as an
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/// index.
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///
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BitVector AliveBlocks;
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/// UsedBlocks - Set of blocks of which this value is actually used. This
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/// is a bit set which uses the basic block number as an index.
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BitVector UsedBlocks;
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/// NumUses - Number of uses of this register across the entire function.
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///
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unsigned NumUses;
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/// Kills - List of MachineInstruction's which are the last use of this
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/// virtual register (kill it) in their basic block.
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///
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std::vector<MachineInstr*> Kills;
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VarInfo() : DefInst(0), NumUses(0) {}
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/// removeKill - Delete a kill corresponding to the specified
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/// machine instruction. Returns true if there was a kill
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/// corresponding to this instruction, false otherwise.
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bool removeKill(MachineInstr *MI) {
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for (std::vector<MachineInstr*>::iterator i = Kills.begin(),
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e = Kills.end(); i != e; ++i)
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if (*i == MI) {
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Kills.erase(i);
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return true;
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}
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return false;
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}
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void dump() const;
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};
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private:
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/// VirtRegInfo - This list is a mapping from virtual register number to
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/// variable information. FirstVirtualRegister is subtracted from the virtual
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/// register number before indexing into this list.
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///
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std::vector<VarInfo> VirtRegInfo;
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/// ReservedRegisters - This vector keeps track of which registers
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/// are reserved register which are not allocatable by the target machine.
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/// We can not track liveness for values that are in this set.
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///
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BitVector ReservedRegisters;
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private: // Intermediate data structures
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MachineFunction *MF;
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const MRegisterInfo *RegInfo;
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// PhysRegInfo - Keep track of which instruction was the last def/use of a
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// physical register. This is a purely local property, because all physical
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// register references as presumed dead across basic blocks.
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MachineInstr **PhysRegInfo;
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// PhysRegUsed - Keep track whether the physical register has been used after
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// its last definition. This is local property.
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bool *PhysRegUsed;
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// PhysRegPartUse - Keep track of which instruction was the last partial use
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// of a physical register (e.g. on X86 a def of EAX followed by a use of AX).
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// This is a purely local property.
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MachineInstr **PhysRegPartUse;
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// PhysRegPartDef - Keep track of a list of instructions which "partially"
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// defined the physical register (e.g. on X86 AX partially defines EAX).
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// These are turned into use/mod/write if there is a use of the register
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// later in the same block. This is local property.
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SmallVector<MachineInstr*, 4> *PhysRegPartDef;
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SmallVector<unsigned, 4> *PHIVarInfo;
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void addRegisterKills(unsigned Reg, MachineInstr *MI,
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SmallSet<unsigned, 4> &SubKills);
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/// HandlePhysRegKill - Add kills of Reg and its sub-registers to the
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/// uses. Pay special attention to the sub-register uses which may come below
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/// the last use of the whole register.
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bool HandlePhysRegKill(unsigned Reg, MachineInstr *MI,
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SmallSet<unsigned, 4> &SubKills);
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bool HandlePhysRegKill(unsigned Reg, MachineInstr *MI);
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void HandlePhysRegUse(unsigned Reg, MachineInstr *MI);
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void HandlePhysRegDef(unsigned Reg, MachineInstr *MI);
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/// analyzePHINodes - Gather information about the PHI nodes in here. In
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/// particular, we want to map the variable information of a virtual
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/// register which is used in a PHI node. We map that to the BB the vreg
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/// is coming from.
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void analyzePHINodes(const MachineFunction& Fn);
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public:
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virtual bool runOnMachineFunction(MachineFunction &MF);
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/// KillsRegister - Return true if the specified instruction kills the
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/// specified register.
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bool KillsRegister(MachineInstr *MI, unsigned Reg) const;
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/// RegisterDefIsDead - Return true if the specified instruction defines the
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/// specified register, but that definition is dead.
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bool RegisterDefIsDead(MachineInstr *MI, unsigned Reg) const;
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/// ModifiesRegister - Return true if the specified instruction modifies the
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/// specified register.
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bool ModifiesRegister(MachineInstr *MI, unsigned Reg) const;
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//===--------------------------------------------------------------------===//
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// API to update live variable information
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/// instructionChanged - When the address of an instruction changes, this
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/// method should be called so that live variables can update its internal
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/// data structures. This removes the records for OldMI, transfering them to
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/// the records for NewMI.
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void instructionChanged(MachineInstr *OldMI, MachineInstr *NewMI);
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/// addVirtualRegisterKilled - Add information about the fact that the
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/// specified register is killed after being used by the specified
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/// instruction. If AddIfNotFound is true, add a implicit operand if it's
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/// not found.
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void addVirtualRegisterKilled(unsigned IncomingReg, MachineInstr *MI,
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bool AddIfNotFound = false) {
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if (MI->addRegisterKilled(IncomingReg, RegInfo, AddIfNotFound))
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getVarInfo(IncomingReg).Kills.push_back(MI);
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}
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/// removeVirtualRegisterKilled - Remove the specified virtual
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/// register from the live variable information. Returns true if the
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/// variable was marked as killed by the specified instruction,
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/// false otherwise.
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bool removeVirtualRegisterKilled(unsigned reg,
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MachineBasicBlock *MBB,
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MachineInstr *MI) {
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if (!getVarInfo(reg).removeKill(MI))
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return false;
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bool Removed = false;
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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MachineOperand &MO = MI->getOperand(i);
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if (MO.isRegister() && MO.isKill() && MO.getReg() == reg) {
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MO.setIsKill(false);
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Removed = true;
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break;
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}
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}
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assert(Removed && "Register is not used by this instruction!");
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return true;
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}
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/// removeVirtualRegistersKilled - Remove all killed info for the specified
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/// instruction.
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void removeVirtualRegistersKilled(MachineInstr *MI);
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/// addVirtualRegisterDead - Add information about the fact that the specified
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/// register is dead after being used by the specified instruction. If
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/// AddIfNotFound is true, add a implicit operand if it's not found.
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void addVirtualRegisterDead(unsigned IncomingReg, MachineInstr *MI,
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bool AddIfNotFound = false) {
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if (MI->addRegisterDead(IncomingReg, RegInfo, AddIfNotFound))
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getVarInfo(IncomingReg).Kills.push_back(MI);
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}
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/// removeVirtualRegisterDead - Remove the specified virtual
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/// register from the live variable information. Returns true if the
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/// variable was marked dead at the specified instruction, false
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/// otherwise.
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bool removeVirtualRegisterDead(unsigned reg,
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MachineBasicBlock *MBB,
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MachineInstr *MI) {
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if (!getVarInfo(reg).removeKill(MI))
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return false;
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bool Removed = false;
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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MachineOperand &MO = MI->getOperand(i);
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if (MO.isRegister() && MO.isDef() && MO.getReg() == reg) {
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MO.setIsDead(false);
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Removed = true;
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break;
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}
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}
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assert(Removed && "Register is not defined by this instruction!");
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return true;
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}
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/// removeVirtualRegistersDead - Remove all of the dead registers for the
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/// specified instruction from the live variable information.
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void removeVirtualRegistersDead(MachineInstr *MI);
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesAll();
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}
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virtual void releaseMemory() {
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VirtRegInfo.clear();
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}
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/// getVarInfo - Return the VarInfo structure for the specified VIRTUAL
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/// register.
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VarInfo &getVarInfo(unsigned RegIdx);
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void MarkVirtRegAliveInBlock(VarInfo& VRInfo, MachineBasicBlock* DefBlock,
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MachineBasicBlock *BB);
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void MarkVirtRegAliveInBlock(VarInfo& VRInfo, MachineBasicBlock* DefBlock,
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MachineBasicBlock *BB,
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std::vector<MachineBasicBlock*> &WorkList);
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void HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB,
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MachineInstr *MI);
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};
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} // End llvm namespace
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#endif
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