Jakob Stoklund Olesen 864c8702ba Also combine zext/sext into selects for ARM. ... This turns common i1 patterns into predicated instructions: (add (zext cc), x) -> (select cc (add x, 1), x) (add (sext cc), x) -> (select cc (add x, -1), x) For a function like: unsigned f(unsigned s, int x) { return s + (x>0); } We now produce: cmp r1, #0 it gt addgt.w r0, r0, #1 Instead of: movs r2, #0 cmp r1, #0 it gt movgt r2, #1 add r0, r2 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162177 91177308-0d34-0410-b5e6-96231b3b80d8		2012-08-18 21:25:22 +00:00
..
Analysis	MemoryBuiltins: Properly guard ObjectSizeOffsetVisitor against cycles in the IR.	2012-08-17 19:26:41 +00:00
Archive	Remove references to compression in llvm-ar. It has been a long time since we	2012-08-10 01:57:52 +00:00
AsmParser	Change the linker_private_weak_def_auto' linkage to linkonce_odr_auto_hide' to	2012-08-17 18:33:14 +00:00
Bitcode	Change the linker_private_weak_def_auto' linkage to linkonce_odr_auto_hide' to	2012-08-17 18:33:14 +00:00
CodeGen	Make atomic load and store of pointers work. Tighten verification of atomic operations	2012-08-17 23:24:29 +00:00
DebugInfo	Fix the representation of debug line table in DebugInfo LLVM library,	2012-08-07 11:46:57 +00:00
ExecutionEngine	Correct MCJIT functionality for MIPS32 architecture.	2012-08-17 21:28:04 +00:00
Linker
MC	When emitting the PC range in an FDE, use the same data encoding for both ends	2012-08-12 08:09:45 +00:00
Object
Support	Properly test the LLVM_USE_RVALUE_REFERENCES macro.	2012-08-15 19:16:27 +00:00
TableGen
Target	Also combine zext/sext into selects for ARM.	2012-08-18 21:25:22 +00:00
Transforms	Remove overly conservative hasOneUse check, this always expands into a single IR instruction.	2012-08-18 20:24:19 +00:00
VMCore	Make atomic load and store of pointers work. Tighten verification of atomic operations	2012-08-17 23:24:29 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile