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https://github.com/c64scene-ar/llvm-6502.git
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We were already always passing true, this just removes the option. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208205 91177308-0d34-0410-b5e6-96231b3b80d8
213 lines
7.9 KiB
C++
213 lines
7.9 KiB
C++
//===-- SparcMCTargetDesc.cpp - Sparc Target Descriptions -----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides Sparc specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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#include "SparcMCTargetDesc.h"
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#include "InstPrinter/SparcInstPrinter.h"
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#include "SparcMCAsmInfo.h"
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#include "SparcTargetStreamer.h"
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#include "llvm/MC/MCCodeGenInfo.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/TargetRegistry.h"
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using namespace llvm;
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#define GET_INSTRINFO_MC_DESC
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#include "SparcGenInstrInfo.inc"
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#define GET_SUBTARGETINFO_MC_DESC
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#include "SparcGenSubtargetInfo.inc"
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#define GET_REGINFO_MC_DESC
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#include "SparcGenRegisterInfo.inc"
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static MCAsmInfo *createSparcMCAsmInfo(const MCRegisterInfo &MRI,
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StringRef TT) {
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MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
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unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
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MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 0);
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MAI->addInitialFrameState(Inst);
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return MAI;
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}
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static MCAsmInfo *createSparcV9MCAsmInfo(const MCRegisterInfo &MRI,
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StringRef TT) {
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MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
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unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
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MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 2047);
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MAI->addInitialFrameState(Inst);
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return MAI;
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}
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static MCInstrInfo *createSparcMCInstrInfo() {
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MCInstrInfo *X = new MCInstrInfo();
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InitSparcMCInstrInfo(X);
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return X;
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}
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static MCRegisterInfo *createSparcMCRegisterInfo(StringRef TT) {
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MCRegisterInfo *X = new MCRegisterInfo();
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InitSparcMCRegisterInfo(X, SP::O7);
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return X;
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}
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static MCSubtargetInfo *createSparcMCSubtargetInfo(StringRef TT, StringRef CPU,
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StringRef FS) {
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MCSubtargetInfo *X = new MCSubtargetInfo();
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Triple TheTriple(TT);
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if (CPU.empty())
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CPU = (TheTriple.getArch() == Triple::sparcv9) ? "v9" : "v8";
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InitSparcMCSubtargetInfo(X, TT, CPU, FS);
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return X;
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}
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// Code models. Some only make sense for 64-bit code.
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//
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// SunCC Reloc CodeModel Constraints
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// abs32 Static Small text+data+bss linked below 2^32 bytes
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// abs44 Static Medium text+data+bss linked below 2^44 bytes
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// abs64 Static Large text smaller than 2^31 bytes
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// pic13 PIC_ Small GOT < 2^13 bytes
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// pic32 PIC_ Medium GOT < 2^32 bytes
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//
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// All code models require that the text segment is smaller than 2GB.
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static MCCodeGenInfo *createSparcMCCodeGenInfo(StringRef TT, Reloc::Model RM,
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CodeModel::Model CM,
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CodeGenOpt::Level OL) {
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MCCodeGenInfo *X = new MCCodeGenInfo();
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// The default 32-bit code model is abs32/pic32 and the default 32-bit
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// code model for JIT is abs32.
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switch (CM) {
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default: break;
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case CodeModel::Default:
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case CodeModel::JITDefault: CM = CodeModel::Small; break;
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}
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X->InitMCCodeGenInfo(RM, CM, OL);
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return X;
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}
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static MCCodeGenInfo *createSparcV9MCCodeGenInfo(StringRef TT, Reloc::Model RM,
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CodeModel::Model CM,
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CodeGenOpt::Level OL) {
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MCCodeGenInfo *X = new MCCodeGenInfo();
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// The default 64-bit code model is abs44/pic32 and the default 64-bit
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// code model for JIT is abs64.
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switch (CM) {
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default: break;
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case CodeModel::Default:
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CM = RM == Reloc::PIC_ ? CodeModel::Small : CodeModel::Medium;
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break;
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case CodeModel::JITDefault:
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CM = CodeModel::Large;
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break;
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}
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X->InitMCCodeGenInfo(RM, CM, OL);
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return X;
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}
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static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
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MCContext &Context, MCAsmBackend &MAB,
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raw_ostream &OS, MCCodeEmitter *Emitter,
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const MCSubtargetInfo &STI, bool RelaxAll,
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bool NoExecStack) {
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MCStreamer *S =
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createELFStreamer(Context, MAB, OS, Emitter, RelaxAll, NoExecStack);
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new SparcTargetELFStreamer(*S);
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return S;
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}
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static MCStreamer *
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createMCAsmStreamer(MCContext &Ctx, formatted_raw_ostream &OS,
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bool isVerboseAsm, bool useDwarfDirectory,
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MCInstPrinter *InstPrint, MCCodeEmitter *CE,
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MCAsmBackend *TAB, bool ShowInst) {
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MCStreamer *S = llvm::createAsmStreamer(
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Ctx, OS, isVerboseAsm, useDwarfDirectory, InstPrint, CE, TAB, ShowInst);
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new SparcTargetAsmStreamer(*S, OS);
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return S;
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}
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static MCInstPrinter *createSparcMCInstPrinter(const Target &T,
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unsigned SyntaxVariant,
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const MCAsmInfo &MAI,
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const MCInstrInfo &MII,
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const MCRegisterInfo &MRI,
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const MCSubtargetInfo &STI) {
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return new SparcInstPrinter(MAI, MII, MRI, STI);
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}
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extern "C" void LLVMInitializeSparcTargetMC() {
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// Register the MC asm info.
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RegisterMCAsmInfoFn X(TheSparcTarget, createSparcMCAsmInfo);
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RegisterMCAsmInfoFn Y(TheSparcV9Target, createSparcV9MCAsmInfo);
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// Register the MC codegen info.
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TargetRegistry::RegisterMCCodeGenInfo(TheSparcTarget,
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createSparcMCCodeGenInfo);
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TargetRegistry::RegisterMCCodeGenInfo(TheSparcV9Target,
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createSparcV9MCCodeGenInfo);
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// Register the MC instruction info.
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TargetRegistry::RegisterMCInstrInfo(TheSparcTarget, createSparcMCInstrInfo);
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TargetRegistry::RegisterMCInstrInfo(TheSparcV9Target, createSparcMCInstrInfo);
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// Register the MC register info.
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TargetRegistry::RegisterMCRegInfo(TheSparcTarget, createSparcMCRegisterInfo);
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TargetRegistry::RegisterMCRegInfo(TheSparcV9Target,
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createSparcMCRegisterInfo);
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// Register the MC subtarget info.
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TargetRegistry::RegisterMCSubtargetInfo(TheSparcTarget,
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createSparcMCSubtargetInfo);
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TargetRegistry::RegisterMCSubtargetInfo(TheSparcV9Target,
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createSparcMCSubtargetInfo);
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// Register the MC Code Emitter.
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TargetRegistry::RegisterMCCodeEmitter(TheSparcTarget,
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createSparcMCCodeEmitter);
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TargetRegistry::RegisterMCCodeEmitter(TheSparcV9Target,
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createSparcMCCodeEmitter);
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//Register the asm backend.
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TargetRegistry::RegisterMCAsmBackend(TheSparcTarget,
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createSparcAsmBackend);
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TargetRegistry::RegisterMCAsmBackend(TheSparcV9Target,
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createSparcAsmBackend);
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// Register the object streamer.
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TargetRegistry::RegisterMCObjectStreamer(TheSparcTarget,
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createMCStreamer);
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TargetRegistry::RegisterMCObjectStreamer(TheSparcV9Target,
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createMCStreamer);
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// Register the asm streamer.
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TargetRegistry::RegisterAsmStreamer(TheSparcTarget,
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createMCAsmStreamer);
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TargetRegistry::RegisterAsmStreamer(TheSparcV9Target,
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createMCAsmStreamer);
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// Register the MCInstPrinter
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TargetRegistry::RegisterMCInstPrinter(TheSparcTarget,
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createSparcMCInstPrinter);
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TargetRegistry::RegisterMCInstPrinter(TheSparcV9Target,
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createSparcMCInstPrinter);
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}
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