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29f94c7201
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209577 91177308-0d34-0410-b5e6-96231b3b80d8
77 lines
2.5 KiB
C++
77 lines
2.5 KiB
C++
//===-- AArch64FixupKinds.h - AArch64 Specific Fixup Entries ----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_AArch64FIXUPKINDS_H
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#define LLVM_AArch64FIXUPKINDS_H
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#include "llvm/MC/MCFixup.h"
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namespace llvm {
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namespace AArch64 {
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enum Fixups {
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// fixup_aarch64_pcrel_adr_imm21 - A 21-bit pc-relative immediate inserted into
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// an ADR instruction.
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fixup_aarch64_pcrel_adr_imm21 = FirstTargetFixupKind,
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// fixup_aarch64_pcrel_adrp_imm21 - A 21-bit pc-relative immediate inserted into
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// an ADRP instruction.
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fixup_aarch64_pcrel_adrp_imm21,
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// fixup_aarch64_imm12 - 12-bit fixup for add/sub instructions.
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// No alignment adjustment. All value bits are encoded.
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fixup_aarch64_add_imm12,
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// fixup_aarch64_ldst_imm12_* - unsigned 12-bit fixups for load and
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// store instructions.
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fixup_aarch64_ldst_imm12_scale1,
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fixup_aarch64_ldst_imm12_scale2,
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fixup_aarch64_ldst_imm12_scale4,
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fixup_aarch64_ldst_imm12_scale8,
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fixup_aarch64_ldst_imm12_scale16,
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// fixup_aarch64_ldr_pcrel_imm19 - The high 19 bits of a 21-bit pc-relative
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// immediate. Same encoding as fixup_aarch64_pcrel_adrhi, except this is used by
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// pc-relative loads and generates relocations directly when necessary.
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fixup_aarch64_ldr_pcrel_imm19,
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// FIXME: comment
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fixup_aarch64_movw,
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// fixup_aarch64_pcrel_imm14 - The high 14 bits of a 21-bit pc-relative
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// immediate.
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fixup_aarch64_pcrel_branch14,
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// fixup_aarch64_pcrel_branch19 - The high 19 bits of a 21-bit pc-relative
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// immediate. Same encoding as fixup_aarch64_pcrel_adrhi, except this is use by
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// b.cc and generates relocations directly when necessary.
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fixup_aarch64_pcrel_branch19,
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// fixup_aarch64_pcrel_branch26 - The high 26 bits of a 28-bit pc-relative
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// immediate.
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fixup_aarch64_pcrel_branch26,
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// fixup_aarch64_pcrel_call26 - The high 26 bits of a 28-bit pc-relative
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// immediate. Distinguished from branch26 only on ELF.
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fixup_aarch64_pcrel_call26,
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// fixup_aarch64_tlsdesc_call - zero-space placeholder for the ELF
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// R_AARCH64_TLSDESC_CALL relocation.
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fixup_aarch64_tlsdesc_call,
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// Marker
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LastTargetFixupKind,
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NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
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};
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} // end namespace AArch64
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} // end namespace llvm
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#endif
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