mirror of
https://github.com/c64scene-ar/llvm-6502.git
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8699a97a2e
static __thread struct {
int a;
int b;
} teste = {0, 0};
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43722 91177308-0d34-0410-b5e6-96231b3b80d8
1029 lines
36 KiB
C++
1029 lines
36 KiB
C++
//===-- ARMAsmPrinter.cpp - ARM LLVM assembly writer ----------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the "Instituto Nokia de Tecnologia" and
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// is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a printer that converts from our internal representation
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// of machine-dependent LLVM code to GAS-format ARM assembly language.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "asm-printer"
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#include "ARM.h"
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#include "ARMTargetMachine.h"
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#include "ARMAddressingModes.h"
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#include "ARMConstantPoolValue.h"
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#include "ARMMachineFunctionInfo.h"
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#include "llvm/Constants.h"
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#include "llvm/Module.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/CodeGen/DwarfWriter.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineJumpTableInfo.h"
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#include "llvm/Target/TargetAsmInfo.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/Mangler.h"
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#include "llvm/Support/MathExtras.h"
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#include <cctype>
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using namespace llvm;
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STATISTIC(EmittedInsts, "Number of machine instrs printed");
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namespace {
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struct VISIBILITY_HIDDEN ARMAsmPrinter : public AsmPrinter {
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ARMAsmPrinter(std::ostream &O, TargetMachine &TM, const TargetAsmInfo *T)
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: AsmPrinter(O, TM, T), DW(O, this, T), AFI(NULL), InCPMode(false) {
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Subtarget = &TM.getSubtarget<ARMSubtarget>();
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}
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DwarfWriter DW;
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/// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
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/// make the right decision when printing asm code for different targets.
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const ARMSubtarget *Subtarget;
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/// AFI - Keep a pointer to ARMFunctionInfo for the current
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/// MachineFunction
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ARMFunctionInfo *AFI;
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/// We name each basic block in a Function with a unique number, so
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/// that we can consistently refer to them later. This is cleared
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/// at the beginning of each call to runOnMachineFunction().
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///
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typedef std::map<const Value *, unsigned> ValueMapTy;
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ValueMapTy NumberForBB;
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/// Keeps the set of GlobalValues that require non-lazy-pointers for
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/// indirect access.
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std::set<std::string> GVNonLazyPtrs;
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/// Keeps the set of external function GlobalAddresses that the asm
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/// printer should generate stubs for.
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std::set<std::string> FnStubs;
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/// True if asm printer is printing a series of CONSTPOOL_ENTRY.
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bool InCPMode;
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virtual const char *getPassName() const {
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return "ARM Assembly Printer";
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}
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void printOperand(const MachineInstr *MI, int opNum,
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const char *Modifier = 0);
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void printSOImmOperand(const MachineInstr *MI, int opNum);
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void printSOImm2PartOperand(const MachineInstr *MI, int opNum);
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void printSORegOperand(const MachineInstr *MI, int opNum);
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void printAddrMode2Operand(const MachineInstr *MI, int OpNo);
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void printAddrMode2OffsetOperand(const MachineInstr *MI, int OpNo);
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void printAddrMode3Operand(const MachineInstr *MI, int OpNo);
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void printAddrMode3OffsetOperand(const MachineInstr *MI, int OpNo);
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void printAddrMode4Operand(const MachineInstr *MI, int OpNo,
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const char *Modifier = 0);
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void printAddrMode5Operand(const MachineInstr *MI, int OpNo,
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const char *Modifier = 0);
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void printAddrModePCOperand(const MachineInstr *MI, int OpNo,
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const char *Modifier = 0);
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void printThumbAddrModeRROperand(const MachineInstr *MI, int OpNo);
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void printThumbAddrModeRI5Operand(const MachineInstr *MI, int OpNo,
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unsigned Scale);
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void printThumbAddrModeS1Operand(const MachineInstr *MI, int OpNo);
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void printThumbAddrModeS2Operand(const MachineInstr *MI, int OpNo);
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void printThumbAddrModeS4Operand(const MachineInstr *MI, int OpNo);
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void printThumbAddrModeSPOperand(const MachineInstr *MI, int OpNo);
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void printPredicateOperand(const MachineInstr *MI, int opNum);
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void printSBitModifierOperand(const MachineInstr *MI, int opNum);
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void printPCLabel(const MachineInstr *MI, int opNum);
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void printRegisterList(const MachineInstr *MI, int opNum);
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void printCPInstOperand(const MachineInstr *MI, int opNum,
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const char *Modifier);
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void printJTBlockOperand(const MachineInstr *MI, int opNum);
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virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant, const char *ExtraCode);
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bool printInstruction(const MachineInstr *MI); // autogenerated.
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void printMachineInstruction(const MachineInstr *MI);
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bool runOnMachineFunction(MachineFunction &F);
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bool doInitialization(Module &M);
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bool doFinalization(Module &M);
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virtual void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) {
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printDataDirective(MCPV->getType());
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ARMConstantPoolValue *ACPV = (ARMConstantPoolValue*)MCPV;
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GlobalValue *GV = ACPV->getGV();
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std::string Name = GV ? Mang->getValueName(GV) : TAI->getGlobalPrefix();
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if (!GV)
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Name += ACPV->getSymbol();
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if (ACPV->isNonLazyPointer()) {
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GVNonLazyPtrs.insert(Name);
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O << TAI->getPrivateGlobalPrefix() << Name << "$non_lazy_ptr";
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} else if (ACPV->isStub()) {
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FnStubs.insert(Name);
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O << TAI->getPrivateGlobalPrefix() << Name << "$stub";
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} else
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O << Name;
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if (ACPV->hasModifier()) O << "(" << ACPV->getModifier() << ")";
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if (ACPV->getPCAdjustment() != 0) {
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O << "-(" << TAI->getPrivateGlobalPrefix() << "PC"
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<< utostr(ACPV->getLabelId())
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<< "+" << (unsigned)ACPV->getPCAdjustment();
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if (ACPV->mustAddCurrentAddress())
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O << "-.";
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O << ")";
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}
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O << "\n";
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// If the constant pool value is a extern weak symbol, remember to emit
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// the weak reference.
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if (GV && GV->hasExternalWeakLinkage())
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ExtWeakSymbols.insert(GV);
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}
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void getAnalysisUsage(AnalysisUsage &AU) const {
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AsmPrinter::getAnalysisUsage(AU);
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AU.setPreservesAll();
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AU.addRequired<MachineModuleInfo>();
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}
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};
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} // end of anonymous namespace
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#include "ARMGenAsmWriter.inc"
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/// createARMCodePrinterPass - Returns a pass that prints the ARM
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/// assembly code for a MachineFunction to the given output stream,
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/// using the given target machine description. This should work
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/// regardless of whether the function is in SSA form.
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///
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FunctionPass *llvm::createARMCodePrinterPass(std::ostream &o,
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ARMTargetMachine &tm) {
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return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo());
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}
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/// runOnMachineFunction - This uses the printInstruction()
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/// method to print assembly for each instruction.
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///
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bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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AFI = MF.getInfo<ARMFunctionInfo>();
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DW.SetModuleInfo(&getAnalysis<MachineModuleInfo>());
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SetupMachineFunction(MF);
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O << "\n";
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// NOTE: we don't print out constant pools here, they are handled as
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// instructions.
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O << "\n";
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// Print out labels for the function.
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const Function *F = MF.getFunction();
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switch (F->getLinkage()) {
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default: assert(0 && "Unknown linkage type!");
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case Function::InternalLinkage:
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SwitchToTextSection("\t.text", F);
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break;
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case Function::ExternalLinkage:
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SwitchToTextSection("\t.text", F);
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O << "\t.globl\t" << CurrentFnName << "\n";
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break;
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case Function::WeakLinkage:
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case Function::LinkOnceLinkage:
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if (Subtarget->isTargetDarwin()) {
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SwitchToTextSection(
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".section __TEXT,__textcoal_nt,coalesced,pure_instructions", F);
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O << "\t.globl\t" << CurrentFnName << "\n";
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O << "\t.weak_definition\t" << CurrentFnName << "\n";
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} else {
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O << TAI->getWeakRefDirective() << CurrentFnName << "\n";
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}
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break;
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}
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const char *VisibilityDirective = NULL;
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if (F->hasHiddenVisibility())
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VisibilityDirective = TAI->getHiddenDirective();
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else if (F->hasProtectedVisibility())
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VisibilityDirective = TAI->getProtectedDirective();
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if (VisibilityDirective)
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O << VisibilityDirective << CurrentFnName << "\n";
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if (AFI->isThumbFunction()) {
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EmitAlignment(1, F, AFI->getAlign());
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O << "\t.code\t16\n";
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O << "\t.thumb_func";
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if (Subtarget->isTargetDarwin())
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O << "\t" << CurrentFnName;
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O << "\n";
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InCPMode = false;
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} else
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EmitAlignment(2, F);
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O << CurrentFnName << ":\n";
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// Emit pre-function debug information.
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DW.BeginFunction(&MF);
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// Print out code for the function.
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for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
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I != E; ++I) {
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// Print a label for the basic block.
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if (I != MF.begin()) {
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printBasicBlockLabel(I, true);
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O << '\n';
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}
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for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
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II != E; ++II) {
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// Print the assembly for the instruction.
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printMachineInstruction(II);
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}
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}
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if (TAI->hasDotTypeDotSizeDirective())
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O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
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// Emit post-function debug information.
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DW.EndFunction();
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return false;
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}
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void ARMAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
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const char *Modifier) {
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const MachineOperand &MO = MI->getOperand(opNum);
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switch (MO.getType()) {
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case MachineOperand::MO_Register:
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if (MRegisterInfo::isPhysicalRegister(MO.getReg()))
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O << TM.getRegisterInfo()->get(MO.getReg()).Name;
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else
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assert(0 && "not implemented");
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break;
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case MachineOperand::MO_Immediate: {
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if (!Modifier || strcmp(Modifier, "no_hash") != 0)
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O << "#";
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O << (int)MO.getImmedValue();
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break;
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}
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case MachineOperand::MO_MachineBasicBlock:
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printBasicBlockLabel(MO.getMachineBasicBlock());
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return;
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case MachineOperand::MO_GlobalAddress: {
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bool isCallOp = Modifier && !strcmp(Modifier, "call");
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GlobalValue *GV = MO.getGlobal();
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std::string Name = Mang->getValueName(GV);
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bool isExt = (GV->isDeclaration() || GV->hasWeakLinkage() ||
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GV->hasLinkOnceLinkage());
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if (isExt && isCallOp && Subtarget->isTargetDarwin() &&
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TM.getRelocationModel() != Reloc::Static) {
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O << TAI->getPrivateGlobalPrefix() << Name << "$stub";
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FnStubs.insert(Name);
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} else
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O << Name;
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if (MO.getOffset() > 0)
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O << '+' << MO.getOffset();
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else if (MO.getOffset() < 0)
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O << MO.getOffset();
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if (isCallOp && Subtarget->isTargetELF() &&
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TM.getRelocationModel() == Reloc::PIC_)
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O << "(PLT)";
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if (GV->hasExternalWeakLinkage())
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ExtWeakSymbols.insert(GV);
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break;
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}
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case MachineOperand::MO_ExternalSymbol: {
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bool isCallOp = Modifier && !strcmp(Modifier, "call");
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std::string Name(TAI->getGlobalPrefix());
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Name += MO.getSymbolName();
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if (isCallOp && Subtarget->isTargetDarwin() &&
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TM.getRelocationModel() != Reloc::Static) {
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O << TAI->getPrivateGlobalPrefix() << Name << "$stub";
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FnStubs.insert(Name);
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} else
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O << Name;
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if (isCallOp && Subtarget->isTargetELF() &&
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TM.getRelocationModel() == Reloc::PIC_)
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O << "(PLT)";
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break;
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}
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case MachineOperand::MO_ConstantPoolIndex:
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O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
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<< '_' << MO.getConstantPoolIndex();
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break;
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case MachineOperand::MO_JumpTableIndex:
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O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
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<< '_' << MO.getJumpTableIndex();
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break;
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default:
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O << "<unknown operand type>"; abort (); break;
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}
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}
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static void printSOImm(std::ostream &O, int64_t V, const TargetAsmInfo *TAI) {
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assert(V < (1 << 12) && "Not a valid so_imm value!");
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unsigned Imm = ARM_AM::getSOImmValImm(V);
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unsigned Rot = ARM_AM::getSOImmValRot(V);
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// Print low-level immediate formation info, per
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// A5.1.3: "Data-processing operands - Immediate".
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if (Rot) {
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O << "#" << Imm << ", " << Rot;
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// Pretty printed version.
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O << ' ' << TAI->getCommentString() << ' ' << (int)ARM_AM::rotr32(Imm, Rot);
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} else {
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O << "#" << Imm;
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}
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}
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/// printSOImmOperand - SOImm is 4-bit rotate amount in bits 8-11 with 8-bit
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/// immediate in bits 0-7.
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void ARMAsmPrinter::printSOImmOperand(const MachineInstr *MI, int OpNum) {
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const MachineOperand &MO = MI->getOperand(OpNum);
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assert(MO.isImmediate() && "Not a valid so_imm value!");
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printSOImm(O, MO.getImmedValue(), TAI);
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}
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/// printSOImm2PartOperand - SOImm is broken into two pieces using a mov
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/// followed by a or to materialize.
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void ARMAsmPrinter::printSOImm2PartOperand(const MachineInstr *MI, int OpNum) {
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const MachineOperand &MO = MI->getOperand(OpNum);
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assert(MO.isImmediate() && "Not a valid so_imm value!");
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unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO.getImmedValue());
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unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO.getImmedValue());
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printSOImm(O, ARM_AM::getSOImmVal(V1), TAI);
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O << "\n\torr";
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printPredicateOperand(MI, 2);
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O << " ";
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printOperand(MI, 0);
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O << ", ";
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printOperand(MI, 0);
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O << ", ";
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printSOImm(O, ARM_AM::getSOImmVal(V2), TAI);
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}
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// so_reg is a 4-operand unit corresponding to register forms of the A5.1
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// "Addressing Mode 1 - Data-processing operands" forms. This includes:
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// REG 0 0 - e.g. R5
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// REG REG 0,SH_OPC - e.g. R5, ROR R3
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// REG 0 IMM,SH_OPC - e.g. R5, LSL #3
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void ARMAsmPrinter::printSORegOperand(const MachineInstr *MI, int Op) {
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const MachineOperand &MO1 = MI->getOperand(Op);
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const MachineOperand &MO2 = MI->getOperand(Op+1);
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const MachineOperand &MO3 = MI->getOperand(Op+2);
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assert(MRegisterInfo::isPhysicalRegister(MO1.getReg()));
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O << TM.getRegisterInfo()->get(MO1.getReg()).Name;
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// Print the shift opc.
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O << ", "
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<< ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImmedValue()))
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<< " ";
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if (MO2.getReg()) {
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assert(MRegisterInfo::isPhysicalRegister(MO2.getReg()));
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O << TM.getRegisterInfo()->get(MO2.getReg()).Name;
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assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0);
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} else {
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O << "#" << ARM_AM::getSORegOffset(MO3.getImm());
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}
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}
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void ARMAsmPrinter::printAddrMode2Operand(const MachineInstr *MI, int Op) {
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const MachineOperand &MO1 = MI->getOperand(Op);
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const MachineOperand &MO2 = MI->getOperand(Op+1);
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const MachineOperand &MO3 = MI->getOperand(Op+2);
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if (!MO1.isRegister()) { // FIXME: This is for CP entries, but isn't right.
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printOperand(MI, Op);
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return;
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}
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O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name;
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if (!MO2.getReg()) {
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if (ARM_AM::getAM2Offset(MO3.getImm())) // Don't print +0.
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O << ", #"
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<< (char)ARM_AM::getAM2Op(MO3.getImm())
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<< ARM_AM::getAM2Offset(MO3.getImm());
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O << "]";
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return;
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}
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O << ", "
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<< (char)ARM_AM::getAM2Op(MO3.getImm())
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<< TM.getRegisterInfo()->get(MO2.getReg()).Name;
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if (unsigned ShImm = ARM_AM::getAM2Offset(MO3.getImm()))
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O << ", "
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<< ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO3.getImmedValue()))
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<< " #" << ShImm;
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O << "]";
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}
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void ARMAsmPrinter::printAddrMode2OffsetOperand(const MachineInstr *MI, int Op){
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const MachineOperand &MO1 = MI->getOperand(Op);
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const MachineOperand &MO2 = MI->getOperand(Op+1);
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if (!MO1.getReg()) {
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unsigned ImmOffs = ARM_AM::getAM2Offset(MO2.getImm());
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assert(ImmOffs && "Malformed indexed load / store!");
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O << "#"
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<< (char)ARM_AM::getAM2Op(MO2.getImm())
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<< ImmOffs;
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return;
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}
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O << (char)ARM_AM::getAM2Op(MO2.getImm())
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<< TM.getRegisterInfo()->get(MO1.getReg()).Name;
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if (unsigned ShImm = ARM_AM::getAM2Offset(MO2.getImm()))
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O << ", "
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<< ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO2.getImmedValue()))
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<< " #" << ShImm;
|
|
}
|
|
|
|
void ARMAsmPrinter::printAddrMode3Operand(const MachineInstr *MI, int Op) {
|
|
const MachineOperand &MO1 = MI->getOperand(Op);
|
|
const MachineOperand &MO2 = MI->getOperand(Op+1);
|
|
const MachineOperand &MO3 = MI->getOperand(Op+2);
|
|
|
|
assert(MRegisterInfo::isPhysicalRegister(MO1.getReg()));
|
|
O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name;
|
|
|
|
if (MO2.getReg()) {
|
|
O << ", "
|
|
<< (char)ARM_AM::getAM3Op(MO3.getImm())
|
|
<< TM.getRegisterInfo()->get(MO2.getReg()).Name
|
|
<< "]";
|
|
return;
|
|
}
|
|
|
|
if (unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm()))
|
|
O << ", #"
|
|
<< (char)ARM_AM::getAM3Op(MO3.getImm())
|
|
<< ImmOffs;
|
|
O << "]";
|
|
}
|
|
|
|
void ARMAsmPrinter::printAddrMode3OffsetOperand(const MachineInstr *MI, int Op){
|
|
const MachineOperand &MO1 = MI->getOperand(Op);
|
|
const MachineOperand &MO2 = MI->getOperand(Op+1);
|
|
|
|
if (MO1.getReg()) {
|
|
O << (char)ARM_AM::getAM3Op(MO2.getImm())
|
|
<< TM.getRegisterInfo()->get(MO1.getReg()).Name;
|
|
return;
|
|
}
|
|
|
|
unsigned ImmOffs = ARM_AM::getAM3Offset(MO2.getImm());
|
|
assert(ImmOffs && "Malformed indexed load / store!");
|
|
O << "#"
|
|
<< (char)ARM_AM::getAM3Op(MO2.getImm())
|
|
<< ImmOffs;
|
|
}
|
|
|
|
void ARMAsmPrinter::printAddrMode4Operand(const MachineInstr *MI, int Op,
|
|
const char *Modifier) {
|
|
const MachineOperand &MO1 = MI->getOperand(Op);
|
|
const MachineOperand &MO2 = MI->getOperand(Op+1);
|
|
ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm());
|
|
if (Modifier && strcmp(Modifier, "submode") == 0) {
|
|
if (MO1.getReg() == ARM::SP) {
|
|
bool isLDM = (MI->getOpcode() == ARM::LDM ||
|
|
MI->getOpcode() == ARM::LDM_RET);
|
|
O << ARM_AM::getAMSubModeAltStr(Mode, isLDM);
|
|
} else
|
|
O << ARM_AM::getAMSubModeStr(Mode);
|
|
} else {
|
|
printOperand(MI, Op);
|
|
if (ARM_AM::getAM4WBFlag(MO2.getImm()))
|
|
O << "!";
|
|
}
|
|
}
|
|
|
|
void ARMAsmPrinter::printAddrMode5Operand(const MachineInstr *MI, int Op,
|
|
const char *Modifier) {
|
|
const MachineOperand &MO1 = MI->getOperand(Op);
|
|
const MachineOperand &MO2 = MI->getOperand(Op+1);
|
|
|
|
if (!MO1.isRegister()) { // FIXME: This is for CP entries, but isn't right.
|
|
printOperand(MI, Op);
|
|
return;
|
|
}
|
|
|
|
assert(MRegisterInfo::isPhysicalRegister(MO1.getReg()));
|
|
|
|
if (Modifier && strcmp(Modifier, "submode") == 0) {
|
|
ARM_AM::AMSubMode Mode = ARM_AM::getAM5SubMode(MO2.getImm());
|
|
if (MO1.getReg() == ARM::SP) {
|
|
bool isFLDM = (MI->getOpcode() == ARM::FLDMD ||
|
|
MI->getOpcode() == ARM::FLDMS);
|
|
O << ARM_AM::getAMSubModeAltStr(Mode, isFLDM);
|
|
} else
|
|
O << ARM_AM::getAMSubModeStr(Mode);
|
|
return;
|
|
} else if (Modifier && strcmp(Modifier, "base") == 0) {
|
|
// Used for FSTM{D|S} and LSTM{D|S} operations.
|
|
O << TM.getRegisterInfo()->get(MO1.getReg()).Name;
|
|
if (ARM_AM::getAM5WBFlag(MO2.getImm()))
|
|
O << "!";
|
|
return;
|
|
}
|
|
|
|
O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name;
|
|
|
|
if (unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm())) {
|
|
O << ", #"
|
|
<< (char)ARM_AM::getAM5Op(MO2.getImm())
|
|
<< ImmOffs*4;
|
|
}
|
|
O << "]";
|
|
}
|
|
|
|
void ARMAsmPrinter::printAddrModePCOperand(const MachineInstr *MI, int Op,
|
|
const char *Modifier) {
|
|
if (Modifier && strcmp(Modifier, "label") == 0) {
|
|
printPCLabel(MI, Op+1);
|
|
return;
|
|
}
|
|
|
|
const MachineOperand &MO1 = MI->getOperand(Op);
|
|
assert(MRegisterInfo::isPhysicalRegister(MO1.getReg()));
|
|
O << "[pc, +" << TM.getRegisterInfo()->get(MO1.getReg()).Name << "]";
|
|
}
|
|
|
|
void
|
|
ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, int Op) {
|
|
const MachineOperand &MO1 = MI->getOperand(Op);
|
|
const MachineOperand &MO2 = MI->getOperand(Op+1);
|
|
O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name;
|
|
O << ", " << TM.getRegisterInfo()->get(MO2.getReg()).Name << "]";
|
|
}
|
|
|
|
void
|
|
ARMAsmPrinter::printThumbAddrModeRI5Operand(const MachineInstr *MI, int Op,
|
|
unsigned Scale) {
|
|
const MachineOperand &MO1 = MI->getOperand(Op);
|
|
const MachineOperand &MO2 = MI->getOperand(Op+1);
|
|
const MachineOperand &MO3 = MI->getOperand(Op+2);
|
|
|
|
if (!MO1.isRegister()) { // FIXME: This is for CP entries, but isn't right.
|
|
printOperand(MI, Op);
|
|
return;
|
|
}
|
|
|
|
O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name;
|
|
if (MO3.getReg())
|
|
O << ", " << TM.getRegisterInfo()->get(MO3.getReg()).Name;
|
|
else if (unsigned ImmOffs = MO2.getImm()) {
|
|
O << ", #" << ImmOffs;
|
|
if (Scale > 1)
|
|
O << " * " << Scale;
|
|
}
|
|
O << "]";
|
|
}
|
|
|
|
void
|
|
ARMAsmPrinter::printThumbAddrModeS1Operand(const MachineInstr *MI, int Op) {
|
|
printThumbAddrModeRI5Operand(MI, Op, 1);
|
|
}
|
|
void
|
|
ARMAsmPrinter::printThumbAddrModeS2Operand(const MachineInstr *MI, int Op) {
|
|
printThumbAddrModeRI5Operand(MI, Op, 2);
|
|
}
|
|
void
|
|
ARMAsmPrinter::printThumbAddrModeS4Operand(const MachineInstr *MI, int Op) {
|
|
printThumbAddrModeRI5Operand(MI, Op, 4);
|
|
}
|
|
|
|
void ARMAsmPrinter::printThumbAddrModeSPOperand(const MachineInstr *MI,int Op) {
|
|
const MachineOperand &MO1 = MI->getOperand(Op);
|
|
const MachineOperand &MO2 = MI->getOperand(Op+1);
|
|
O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name;
|
|
if (unsigned ImmOffs = MO2.getImm())
|
|
O << ", #" << ImmOffs << " * 4";
|
|
O << "]";
|
|
}
|
|
|
|
void ARMAsmPrinter::printPredicateOperand(const MachineInstr *MI, int opNum) {
|
|
ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(opNum).getImmedValue();
|
|
if (CC != ARMCC::AL)
|
|
O << ARMCondCodeToString(CC);
|
|
}
|
|
|
|
void ARMAsmPrinter::printSBitModifierOperand(const MachineInstr *MI, int opNum){
|
|
unsigned Reg = MI->getOperand(opNum).getReg();
|
|
if (Reg) {
|
|
assert(Reg == ARM::CPSR && "Expect ARM CPSR register!");
|
|
O << 's';
|
|
}
|
|
}
|
|
|
|
void ARMAsmPrinter::printPCLabel(const MachineInstr *MI, int opNum) {
|
|
int Id = (int)MI->getOperand(opNum).getImmedValue();
|
|
O << TAI->getPrivateGlobalPrefix() << "PC" << Id;
|
|
}
|
|
|
|
void ARMAsmPrinter::printRegisterList(const MachineInstr *MI, int opNum) {
|
|
O << "{";
|
|
for (unsigned i = opNum, e = MI->getNumOperands(); i != e; ++i) {
|
|
printOperand(MI, i);
|
|
if (i != e-1) O << ", ";
|
|
}
|
|
O << "}";
|
|
}
|
|
|
|
void ARMAsmPrinter::printCPInstOperand(const MachineInstr *MI, int OpNo,
|
|
const char *Modifier) {
|
|
assert(Modifier && "This operand only works with a modifier!");
|
|
// There are two aspects to a CONSTANTPOOL_ENTRY operand, the label and the
|
|
// data itself.
|
|
if (!strcmp(Modifier, "label")) {
|
|
unsigned ID = MI->getOperand(OpNo).getImm();
|
|
O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
|
|
<< '_' << ID << ":\n";
|
|
} else {
|
|
assert(!strcmp(Modifier, "cpentry") && "Unknown modifier for CPE");
|
|
unsigned CPI = MI->getOperand(OpNo).getConstantPoolIndex();
|
|
|
|
const MachineConstantPoolEntry &MCPE = // Chasing pointers is fun?
|
|
MI->getParent()->getParent()->getConstantPool()->getConstants()[CPI];
|
|
|
|
if (MCPE.isMachineConstantPoolEntry())
|
|
EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal);
|
|
else {
|
|
EmitGlobalConstant(MCPE.Val.ConstVal);
|
|
// remember to emit the weak reference
|
|
if (const GlobalValue *GV = dyn_cast<GlobalValue>(MCPE.Val.ConstVal))
|
|
if (GV->hasExternalWeakLinkage())
|
|
ExtWeakSymbols.insert(GV);
|
|
}
|
|
}
|
|
}
|
|
|
|
void ARMAsmPrinter::printJTBlockOperand(const MachineInstr *MI, int OpNo) {
|
|
const MachineOperand &MO1 = MI->getOperand(OpNo);
|
|
const MachineOperand &MO2 = MI->getOperand(OpNo+1); // Unique Id
|
|
unsigned JTI = MO1.getJumpTableIndex();
|
|
O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
|
|
<< '_' << JTI << '_' << MO2.getImmedValue() << ":\n";
|
|
|
|
const char *JTEntryDirective = TAI->getJumpTableDirective();
|
|
if (!JTEntryDirective)
|
|
JTEntryDirective = TAI->getData32bitsDirective();
|
|
|
|
const MachineFunction *MF = MI->getParent()->getParent();
|
|
MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
|
|
const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
|
|
const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
|
|
bool UseSet= TAI->getSetDirective() && TM.getRelocationModel() == Reloc::PIC_;
|
|
std::set<MachineBasicBlock*> JTSets;
|
|
for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
|
|
MachineBasicBlock *MBB = JTBBs[i];
|
|
if (UseSet && JTSets.insert(MBB).second)
|
|
printSetLabel(JTI, MO2.getImmedValue(), MBB);
|
|
|
|
O << JTEntryDirective << ' ';
|
|
if (UseSet)
|
|
O << TAI->getPrivateGlobalPrefix() << getFunctionNumber()
|
|
<< '_' << JTI << '_' << MO2.getImmedValue()
|
|
<< "_set_" << MBB->getNumber();
|
|
else if (TM.getRelocationModel() == Reloc::PIC_) {
|
|
printBasicBlockLabel(MBB, false, false);
|
|
// If the arch uses custom Jump Table directives, don't calc relative to JT
|
|
if (!TAI->getJumpTableDirective())
|
|
O << '-' << TAI->getPrivateGlobalPrefix() << "JTI"
|
|
<< getFunctionNumber() << '_' << JTI << '_' << MO2.getImmedValue();
|
|
} else
|
|
printBasicBlockLabel(MBB, false, false);
|
|
if (i != e-1)
|
|
O << '\n';
|
|
}
|
|
}
|
|
|
|
|
|
bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
|
|
unsigned AsmVariant, const char *ExtraCode){
|
|
// Does this asm operand have a single letter operand modifier?
|
|
if (ExtraCode && ExtraCode[0]) {
|
|
if (ExtraCode[1] != 0) return true; // Unknown modifier.
|
|
|
|
switch (ExtraCode[0]) {
|
|
default: return true; // Unknown modifier.
|
|
case 'c': // Don't print "$" before a global var name or constant.
|
|
case 'P': // Print a VFP double precision register.
|
|
printOperand(MI, OpNo);
|
|
return false;
|
|
case 'Q':
|
|
if (TM.getTargetData()->isLittleEndian())
|
|
break;
|
|
// Fallthrough
|
|
case 'R':
|
|
if (TM.getTargetData()->isBigEndian())
|
|
break;
|
|
// Fallthrough
|
|
case 'H': // Write second word of DI / DF reference.
|
|
// Verify that this operand has two consecutive registers.
|
|
if (!MI->getOperand(OpNo).isRegister() ||
|
|
OpNo+1 == MI->getNumOperands() ||
|
|
!MI->getOperand(OpNo+1).isRegister())
|
|
return true;
|
|
++OpNo; // Return the high-part.
|
|
}
|
|
}
|
|
|
|
printOperand(MI, OpNo);
|
|
return false;
|
|
}
|
|
|
|
void ARMAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
|
|
++EmittedInsts;
|
|
|
|
int Opc = MI->getOpcode();
|
|
switch (Opc) {
|
|
case ARM::CONSTPOOL_ENTRY:
|
|
if (!InCPMode && AFI->isThumbFunction()) {
|
|
EmitAlignment(2);
|
|
InCPMode = true;
|
|
}
|
|
break;
|
|
default: {
|
|
if (InCPMode && AFI->isThumbFunction())
|
|
InCPMode = false;
|
|
switch (Opc) {
|
|
case ARM::PICADD:
|
|
case ARM::PICLD:
|
|
case ARM::PICLDZH:
|
|
case ARM::PICLDZB:
|
|
case ARM::PICLDH:
|
|
case ARM::PICLDB:
|
|
case ARM::PICLDSH:
|
|
case ARM::PICLDSB:
|
|
case ARM::PICSTR:
|
|
case ARM::PICSTRH:
|
|
case ARM::PICSTRB:
|
|
case ARM::tPICADD:
|
|
break;
|
|
default:
|
|
O << "\t";
|
|
break;
|
|
}
|
|
}}
|
|
|
|
// Call the autogenerated instruction printer routines.
|
|
printInstruction(MI);
|
|
}
|
|
|
|
bool ARMAsmPrinter::doInitialization(Module &M) {
|
|
// Emit initial debug information.
|
|
DW.BeginModule(&M);
|
|
|
|
bool Result = AsmPrinter::doInitialization(M);
|
|
|
|
// Darwin wants symbols to be quoted if they have complex names.
|
|
if (Subtarget->isTargetDarwin())
|
|
Mang->setUseQuotes(true);
|
|
|
|
return Result;
|
|
}
|
|
|
|
bool ARMAsmPrinter::doFinalization(Module &M) {
|
|
const TargetData *TD = TM.getTargetData();
|
|
|
|
for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
|
|
I != E; ++I) {
|
|
if (!I->hasInitializer()) // External global require no code
|
|
continue;
|
|
|
|
if (EmitSpecialLLVMGlobal(I)) {
|
|
if (Subtarget->isTargetDarwin() &&
|
|
TM.getRelocationModel() == Reloc::Static) {
|
|
if (I->getName() == "llvm.global_ctors")
|
|
O << ".reference .constructors_used\n";
|
|
else if (I->getName() == "llvm.global_dtors")
|
|
O << ".reference .destructors_used\n";
|
|
}
|
|
continue;
|
|
}
|
|
|
|
std::string name = Mang->getValueName(I);
|
|
Constant *C = I->getInitializer();
|
|
const Type *Type = C->getType();
|
|
unsigned Size = TD->getABITypeSize(Type);
|
|
unsigned Align = TD->getPreferredAlignmentLog(I);
|
|
|
|
const char *VisibilityDirective = NULL;
|
|
if (I->hasHiddenVisibility())
|
|
VisibilityDirective = TAI->getHiddenDirective();
|
|
else if (I->hasProtectedVisibility())
|
|
VisibilityDirective = TAI->getProtectedDirective();
|
|
|
|
if (VisibilityDirective)
|
|
O << VisibilityDirective << name << "\n";
|
|
|
|
if (Subtarget->isTargetELF())
|
|
O << "\t.type " << name << ",%object\n";
|
|
|
|
if (C->isNullValue() && !I->hasSection() && !I->isThreadLocal()) {
|
|
if (I->hasExternalLinkage()) {
|
|
if (const char *Directive = TAI->getZeroFillDirective()) {
|
|
O << "\t.globl\t" << name << "\n";
|
|
O << Directive << "__DATA__, __common, " << name << ", "
|
|
<< Size << ", " << Align << "\n";
|
|
continue;
|
|
}
|
|
}
|
|
|
|
if (I->hasInternalLinkage() || I->hasWeakLinkage() ||
|
|
I->hasLinkOnceLinkage()) {
|
|
if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it.
|
|
if (!NoZerosInBSS && TAI->getBSSSection())
|
|
SwitchToDataSection(TAI->getBSSSection(), I);
|
|
else
|
|
SwitchToDataSection(TAI->getDataSection(), I);
|
|
if (TAI->getLCOMMDirective() != NULL) {
|
|
if (I->hasInternalLinkage()) {
|
|
O << TAI->getLCOMMDirective() << name << "," << Size;
|
|
if (Subtarget->isTargetDarwin())
|
|
O << "," << Align;
|
|
} else
|
|
O << TAI->getCOMMDirective() << name << "," << Size;
|
|
} else {
|
|
if (I->hasInternalLinkage())
|
|
O << "\t.local\t" << name << "\n";
|
|
O << TAI->getCOMMDirective() << name << "," << Size;
|
|
if (TAI->getCOMMDirectiveTakesAlignment())
|
|
O << "," << (TAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
|
|
}
|
|
O << "\t\t" << TAI->getCommentString() << " " << I->getName() << "\n";
|
|
continue;
|
|
}
|
|
}
|
|
|
|
switch (I->getLinkage()) {
|
|
case GlobalValue::LinkOnceLinkage:
|
|
case GlobalValue::WeakLinkage:
|
|
if (Subtarget->isTargetDarwin()) {
|
|
O << "\t.globl " << name << "\n"
|
|
<< "\t.weak_definition " << name << "\n";
|
|
SwitchToDataSection("\t.section __DATA,__const_coal,coalesced", I);
|
|
} else {
|
|
std::string SectionName("\t.section\t.llvm.linkonce.d." +
|
|
name +
|
|
",\"aw\",%progbits");
|
|
SwitchToDataSection(SectionName.c_str(), I);
|
|
O << "\t.weak " << name << "\n";
|
|
}
|
|
break;
|
|
case GlobalValue::AppendingLinkage:
|
|
// FIXME: appending linkage variables should go into a section of
|
|
// their name or something. For now, just emit them as external.
|
|
case GlobalValue::ExternalLinkage:
|
|
O << "\t.globl " << name << "\n";
|
|
// FALL THROUGH
|
|
case GlobalValue::InternalLinkage: {
|
|
if (I->isConstant()) {
|
|
const ConstantArray *CVA = dyn_cast<ConstantArray>(C);
|
|
if (TAI->getCStringSection() && CVA && CVA->isCString()) {
|
|
SwitchToDataSection(TAI->getCStringSection(), I);
|
|
break;
|
|
}
|
|
}
|
|
// FIXME: special handling for ".ctors" & ".dtors" sections
|
|
if (I->hasSection() &&
|
|
(I->getSection() == ".ctors" ||
|
|
I->getSection() == ".dtors")) {
|
|
assert(!Subtarget->isTargetDarwin());
|
|
std::string SectionName = ".section " + I->getSection();
|
|
SectionName += ",\"aw\",%progbits";
|
|
SwitchToDataSection(SectionName.c_str());
|
|
} else {
|
|
if (C->isNullValue() && !NoZerosInBSS && TAI->getBSSSection())
|
|
SwitchToDataSection(I->isThreadLocal() ? TAI->getTLSBSSSection() :
|
|
TAI->getBSSSection(), I);
|
|
else if (!I->isConstant())
|
|
SwitchToDataSection(I->isThreadLocal() ? TAI->getTLSDataSection() :
|
|
TAI->getDataSection(), I);
|
|
else if (I->isThreadLocal())
|
|
SwitchToDataSection(TAI->getTLSDataSection());
|
|
else {
|
|
// Read-only data.
|
|
bool HasReloc = C->ContainsRelocations();
|
|
if (HasReloc &&
|
|
Subtarget->isTargetDarwin() &&
|
|
TM.getRelocationModel() != Reloc::Static)
|
|
SwitchToDataSection("\t.const_data\n");
|
|
else if (!HasReloc && Size == 4 &&
|
|
TAI->getFourByteConstantSection())
|
|
SwitchToDataSection(TAI->getFourByteConstantSection(), I);
|
|
else if (!HasReloc && Size == 8 &&
|
|
TAI->getEightByteConstantSection())
|
|
SwitchToDataSection(TAI->getEightByteConstantSection(), I);
|
|
else if (!HasReloc && Size == 16 &&
|
|
TAI->getSixteenByteConstantSection())
|
|
SwitchToDataSection(TAI->getSixteenByteConstantSection(), I);
|
|
else if (TAI->getReadOnlySection())
|
|
SwitchToDataSection(TAI->getReadOnlySection(), I);
|
|
else
|
|
SwitchToDataSection(TAI->getDataSection(), I);
|
|
}
|
|
}
|
|
|
|
break;
|
|
}
|
|
default:
|
|
assert(0 && "Unknown linkage type!");
|
|
break;
|
|
}
|
|
|
|
EmitAlignment(Align, I);
|
|
O << name << ":\t\t\t\t" << TAI->getCommentString() << " " << I->getName()
|
|
<< "\n";
|
|
if (TAI->hasDotTypeDotSizeDirective())
|
|
O << "\t.size " << name << ", " << Size << "\n";
|
|
// If the initializer is a extern weak symbol, remember to emit the weak
|
|
// reference!
|
|
if (const GlobalValue *GV = dyn_cast<GlobalValue>(C))
|
|
if (GV->hasExternalWeakLinkage())
|
|
ExtWeakSymbols.insert(GV);
|
|
|
|
EmitGlobalConstant(C);
|
|
O << '\n';
|
|
}
|
|
|
|
if (Subtarget->isTargetDarwin()) {
|
|
SwitchToDataSection("");
|
|
|
|
// Output stubs for dynamically-linked functions
|
|
unsigned j = 1;
|
|
for (std::set<std::string>::iterator i = FnStubs.begin(), e = FnStubs.end();
|
|
i != e; ++i, ++j) {
|
|
if (TM.getRelocationModel() == Reloc::PIC_)
|
|
SwitchToTextSection(".section __TEXT,__picsymbolstub4,symbol_stubs,"
|
|
"none,16", 0);
|
|
else
|
|
SwitchToTextSection(".section __TEXT,__symbol_stub4,symbol_stubs,"
|
|
"none,12", 0);
|
|
|
|
EmitAlignment(2);
|
|
O << "\t.code\t32\n";
|
|
|
|
O << "L" << *i << "$stub:\n";
|
|
O << "\t.indirect_symbol " << *i << "\n";
|
|
O << "\tldr ip, L" << *i << "$slp\n";
|
|
if (TM.getRelocationModel() == Reloc::PIC_) {
|
|
O << "L" << *i << "$scv:\n";
|
|
O << "\tadd ip, pc, ip\n";
|
|
}
|
|
O << "\tldr pc, [ip, #0]\n";
|
|
O << "L" << *i << "$slp:\n";
|
|
if (TM.getRelocationModel() == Reloc::PIC_)
|
|
O << "\t.long\tL" << *i << "$lazy_ptr-(L" << *i << "$scv+8)\n";
|
|
else
|
|
O << "\t.long\tL" << *i << "$lazy_ptr\n";
|
|
SwitchToDataSection(".lazy_symbol_pointer", 0);
|
|
O << "L" << *i << "$lazy_ptr:\n";
|
|
O << "\t.indirect_symbol " << *i << "\n";
|
|
O << "\t.long\tdyld_stub_binding_helper\n";
|
|
}
|
|
O << "\n";
|
|
|
|
// Output non-lazy-pointers for external and common global variables.
|
|
if (!GVNonLazyPtrs.empty())
|
|
SwitchToDataSection(".non_lazy_symbol_pointer", 0);
|
|
for (std::set<std::string>::iterator i = GVNonLazyPtrs.begin(),
|
|
e = GVNonLazyPtrs.end(); i != e; ++i) {
|
|
O << "L" << *i << "$non_lazy_ptr:\n";
|
|
O << "\t.indirect_symbol " << *i << "\n";
|
|
O << "\t.long\t0\n";
|
|
}
|
|
|
|
// Emit initial debug information.
|
|
DW.EndModule();
|
|
|
|
// Funny Darwin hack: This flag tells the linker that no global symbols
|
|
// contain code that falls through to other global symbols (e.g. the obvious
|
|
// implementation of multiple entry points). If this doesn't occur, the
|
|
// linker can safely perform dead code stripping. Since LLVM never
|
|
// generates code that does this, it is always safe to set.
|
|
O << "\t.subsections_via_symbols\n";
|
|
} else {
|
|
// Emit final debug information for ELF.
|
|
DW.EndModule();
|
|
}
|
|
|
|
return AsmPrinter::doFinalization(M);
|
|
}
|