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49683f3c96
The new target machines are: nvptx (old ptx32) => 32-bit PTX nvptx64 (old ptx64) => 64-bit PTX The sources are based on the internal NVIDIA NVPTX back-end, and contain more functionality than the current PTX back-end currently provides. NV_CONTRIB git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156196 91177308-0d34-0410-b5e6-96231b3b80d8
45 lines
1.6 KiB
TableGen
45 lines
1.6 KiB
TableGen
//===- NVPTX.td - Describe the NVPTX Target Machine -----------*- tblgen -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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// This is the top level entry point for the NVPTX target.
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Target-independent interfaces
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//===----------------------------------------------------------------------===//
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include "llvm/Target/Target.td"
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include "NVPTXRegisterInfo.td"
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include "NVPTXInstrInfo.td"
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//===----------------------------------------------------------------------===//
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// Subtarget Features.
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// - We use the SM version number instead of explicit feature table.
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// - Need at least one feature to avoid generating zero sized array by
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// TableGen in NVPTXGenSubtarget.inc.
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//===----------------------------------------------------------------------===//
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def FeatureDummy : SubtargetFeature<"dummy", "dummy", "true", "">;
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//===----------------------------------------------------------------------===//
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// NVPTX supported processors.
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//===----------------------------------------------------------------------===//
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class Proc<string Name, list<SubtargetFeature> Features>
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: Processor<Name, NoItineraries, Features>;
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def : Proc<"sm_10", [FeatureDummy]>;
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def NVPTXInstrInfo : InstrInfo {
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}
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def NVPTX : Target {
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let InstructionSet = NVPTXInstrInfo;
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}
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