mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-10 01:10:48 +00:00
7b837d8c75
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
64 lines
2.1 KiB
LLVM
64 lines
2.1 KiB
LLVM
; RUN: llc -mtriple=arm64-none-linux-gnu -verify-machineinstrs -show-mc-encoding < %s | FileCheck %s
|
|
; RUN: llc -mtriple=arm64-none-linux-gnu -filetype=obj < %s | llvm-objdump -r - | FileCheck --check-prefix=CHECK-RELOC %s
|
|
|
|
@initial_exec_var = external thread_local(initialexec) global i32
|
|
|
|
define i32 @test_initial_exec() {
|
|
; CHECK-LABEL: test_initial_exec:
|
|
%val = load i32* @initial_exec_var
|
|
|
|
; CHECK: adrp x[[GOTADDR:[0-9]+]], :gottprel:initial_exec_var
|
|
; CHECK: ldr x[[TP_OFFSET:[0-9]+]], [x[[GOTADDR]], :gottprel_lo12:initial_exec_var]
|
|
; CHECK: mrs x[[TP:[0-9]+]], TPIDR_EL0
|
|
; CHECK: ldr w0, [x[[TP]], x[[TP_OFFSET]]]
|
|
|
|
; CHECK-RELOC: R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21
|
|
; CHECK-RELOC: R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC
|
|
|
|
ret i32 %val
|
|
}
|
|
|
|
define i32* @test_initial_exec_addr() {
|
|
; CHECK-LABEL: test_initial_exec_addr:
|
|
ret i32* @initial_exec_var
|
|
|
|
; CHECK: adrp x[[GOTADDR:[0-9]+]], :gottprel:initial_exec_var
|
|
; CHECK: ldr [[TP_OFFSET:x[0-9]+]], [x[[GOTADDR]], :gottprel_lo12:initial_exec_var]
|
|
; CHECK: mrs [[TP:x[0-9]+]], TPIDR_EL0
|
|
; CHECK: add x0, [[TP]], [[TP_OFFSET]]
|
|
|
|
; CHECK-RELOC: R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21
|
|
; CHECK-RELOC: R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC
|
|
|
|
}
|
|
|
|
@local_exec_var = thread_local(localexec) global i32 0
|
|
|
|
define i32 @test_local_exec() {
|
|
; CHECK-LABEL: test_local_exec:
|
|
%val = load i32* @local_exec_var
|
|
|
|
; CHECK: movz [[TP_OFFSET:x[0-9]+]], #:tprel_g1:local_exec_var // encoding: [0bAAA{{[01]+}},A,0b101AAAAA,0x92]
|
|
; CHECK: movk [[TP_OFFSET]], #:tprel_g0_nc:local_exec_var
|
|
; CHECK: mrs x[[TP:[0-9]+]], TPIDR_EL0
|
|
; CHECK: ldr w0, [x[[TP]], [[TP_OFFSET]]]
|
|
|
|
; CHECK-RELOC: R_AARCH64_TLSLE_MOVW_TPREL_G1
|
|
; CHECK-RELOC: R_AARCH64_TLSLE_MOVW_TPREL_G0_NC
|
|
|
|
ret i32 %val
|
|
}
|
|
|
|
define i32* @test_local_exec_addr() {
|
|
; CHECK-LABEL: test_local_exec_addr:
|
|
ret i32* @local_exec_var
|
|
|
|
; CHECK: movz [[TP_OFFSET:x[0-9]+]], #:tprel_g1:local_exec_var
|
|
; CHECK: movk [[TP_OFFSET]], #:tprel_g0_nc:local_exec_var
|
|
; CHECK: mrs [[TP:x[0-9]+]], TPIDR_EL0
|
|
; CHECK: add x0, [[TP]], [[TP_OFFSET]]
|
|
|
|
; CHECK-RELOC: R_AARCH64_TLSLE_MOVW_TPREL_G1
|
|
; CHECK-RELOC: R_AARCH64_TLSLE_MOVW_TPREL_G0_NC
|
|
}
|