Chad Rosier 871f664093 Enables vararg functions that pass all arguments via registers to be optimized into tail-calls when possible. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131560 91177308-0d34-0410-b5e6-96231b3b80d8		2011-05-18 19:59:50 +00:00
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Alpha
ARM	In r131488 I misunderstood how VREV works. It splits the vector in half and splits each half. Therefore, the real problem was that we were using a VREV64 for a 4xi16, when we should have been using a VREV32.	2011-05-18 06:42:21 +00:00
Blackfin
CBackend
CellSPU
CPP
Generic	Move test for appropriate directory.	2011-05-17 19:06:43 +00:00
MBlaze
Mips
MSP430
PowerPC
PTX	PTX: add flag to disable mad/fma selection	2011-05-18 15:42:23 +00:00
SPARC
SystemZ
Thumb	Move this test to CodeGen/Thumb. rdar://problem/9416774	2011-05-11 19:41:28 +00:00
Thumb2	Since I can't reproduce the failures from 131261, re-trying with a	2011-05-13 00:51:54 +00:00
X86	Enables vararg functions that pass all arguments via registers to be optimized into tail-calls when possible.	2011-05-18 19:59:50 +00:00
XCore