Matt Arsenault 87234703e8 R600/SI: Add comments for number of used registers. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196467 91177308-0d34-0410-b5e6-96231b3b80d8

2013-12-05 05:15:35 +00:00

..

AArch64

For AArch64, add missing register cost calculation for big value types like v4i64 and v8i64.

2013-12-05 02:12:01 +00:00

ARM

Add support for parsing ARM symbol variants on ELF targets

2013-12-04 22:43:20 +00:00

CPP

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Generic

Revert r195317 (and r195333), "Teach ISel not to optimize 'optnone' functions."

2013-11-21 10:55:15 +00:00

Hexagon

Debug Info: update testing cases to specify the debug info version number.

2013-11-22 21:49:45 +00:00

Inputs

Debug Info: update testing cases to specify the debug info version number.

2013-11-22 21:49:45 +00:00

Mips

final patch for very long conditional branches for mips16 constant islands.

2013-12-03 23:42:51 +00:00

MSP430

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NVPTX

[NVPTX] Fix handling of indirect calls

2013-11-15 12:30:04 +00:00

PowerPC

Convert a PPC test from grep to FileCheck

2013-11-30 20:04:33 +00:00

R600

R600/SI: Add comments for number of used registers.

2013-12-05 05:15:35 +00:00

SPARC

[Sparc] Emit large negative adjustments to SP/FP with sethi+xor instead of sethi+or. This generates correct code for both sparc32 and sparc64.

2013-11-24 20:23:25 +00:00

SystemZ

[SystemZ] Fix choice of known-zero mask in insertion optimization

2013-12-03 11:01:54 +00:00

Thumb

Use FileCheck and expand the test a bit.

2013-11-27 19:22:14 +00:00

Thumb2

Add support for parsing ARM symbol variants on ELF targets

2013-12-04 22:43:20 +00:00

X86

Add FileCheck statements for r196435.

2013-12-05 01:20:36 +00:00

XCore

XCore target: Make handling of large frames not dependent upon an FP.

2013-12-02 11:05:28 +00:00