llvm-6502/test/MC/Disassembler
Tim Northover 87476b607c ARM64: hexify printing various immediate operands
This is mostly aimed at the NEON logical operations and MOVI/MVNI (since they
accept weird shifts which are more naturally understandable in hex notation).

Also changes BRK/HINT etc, which is probably a neutral change, but easier than
the alternative.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207634 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-30 11:19:28 +00:00
..
AArch64 AArch64: print NEON lists with a space. 2014-04-24 14:06:20 +00:00
ARM ARM: change implicit immediate forms of {ld,st}r{,b}t to psuedo-instructions 2014-01-12 04:36:01 +00:00
ARM64 ARM64: hexify printing various immediate operands 2014-04-30 11:19:28 +00:00
Mips This patch implements jalx instruction for Mips architecture.This instruction executes a procedure call within the current 256 MB-aligned region and change the ISA Mode from MIPS32 to microMIPS32 or MIPS16e. Usage samples for assembler and dissasembler are provided as well. 2014-03-03 13:12:59 +00:00
PowerPC [PowerPC] Initial support for the VSX instruction set 2014-03-13 07:58:58 +00:00
Sparc [Sparc] Add support for decoding 'swap' instruction. 2014-03-09 23:32:07 +00:00
SystemZ [SystemZ] Add support for z196 float<->unsigned conversions 2014-03-21 10:56:30 +00:00
X86 X86Disassembler - fixed a bug in immediate print 2014-04-23 07:21:04 +00:00
XCore