Evan Cheng 875913439c InstrEmitter::EmitSubregNode() optimize extract_subreg in this case: ... r1025 = s/zext r1024, 4 r1026 = extract_subreg r1025, 4 to a copy: r1026 = copy r1024 This is correct. However it uses TII->isCoalescableExtInstr() which can return true for instructions which essentially does a sext_in_reg so this can end up with an illegal copy where the source and destination register classes do not match. Add a check to avoid it. Sorry, no test case possible at this time. rdar://11849816 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160059 91177308-0d34-0410-b5e6-96231b3b80d8		2012-07-11 18:55:07 +00:00
..
Analysis	Delete code for folding undefs in ScalarEvolution. It's invalid in	2012-07-09 23:51:20 +00:00
Archive
AsmParser
Bitcode
CodeGen	InstrEmitter::EmitSubregNode() optimize extract_subreg in this case:	2012-07-11 18:55:07 +00:00
DebugInfo	Fix a bug in DebugInfo lib, extend a comment for one of the methods	2012-07-04 09:42:54 +00:00
ExecutionEngine	Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp and	2012-06-28 00:05:13 +00:00
Linker
MC	I'm introducing a new machine model to simultaneously allow simple	2012-07-07 04:00:00 +00:00
Object
Support	PR13326: Fix a subtle edge case in the udiv -> magic multiply generator.	2012-07-11 18:31:59 +00:00
TableGen
Target	[x86 fast-isel] Rather then call llvm_unreachable() have fast-isel fall back	2012-07-11 17:23:17 +00:00
Transforms	instcombine: merge the functions that remove dead allocas and dead mallocs/callocs/...	2012-07-09 18:38:20 +00:00
VMCore	Use the DebugInfo wrappers instead of mucking about with the MDNode directly.	2012-07-07 00:52:35 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile