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Not all instructions define a virtual register in their first operand. Specifically, INLINEASM has a different format. <rdar://problem/12472811> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165721 91177308-0d34-0410-b5e6-96231b3b80d8
351 lines
13 KiB
C++
351 lines
13 KiB
C++
//===- lib/CodeGen/MachineTraceMetrics.h - Super-scalar metrics -*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the interface for the MachineTraceMetrics analysis pass
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// that estimates CPU resource usage and critical data dependency paths through
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// preferred traces. This is useful for super-scalar CPUs where execution speed
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// can be limited both by data dependencies and by limited execution resources.
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//
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// Out-of-order CPUs will often be executing instructions from multiple basic
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// blocks at the same time. This makes it difficult to estimate the resource
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// usage accurately in a single basic block. Resources can be estimated better
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// by looking at a trace through the current basic block.
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//
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// For every block, the MachineTraceMetrics pass will pick a preferred trace
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// that passes through the block. The trace is chosen based on loop structure,
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// branch probabilities, and resource usage. The intention is to pick likely
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// traces that would be the most affected by code transformations.
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//
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// It is expensive to compute a full arbitrary trace for every block, so to
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// save some computations, traces are chosen to be convergent. This means that
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// if the traces through basic blocks A and B ever cross when moving away from
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// A and B, they never diverge again. This applies in both directions - If the
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// traces meet above A and B, they won't diverge when going further back.
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//
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// Traces tend to align with loops. The trace through a block in an inner loop
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// will begin at the loop entry block and end at a back edge. If there are
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// nested loops, the trace may begin and end at those instead.
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//
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// For each trace, we compute the critical path length, which is the number of
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// cycles required to execute the trace when execution is limited by data
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// dependencies only. We also compute the resource height, which is the number
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// of cycles required to execute all instructions in the trace when ignoring
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// data dependencies.
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//
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// Every instruction in the current block has a slack - the number of cycles
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// execution of the instruction can be delayed without extending the critical
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// path.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_MACHINE_TRACE_METRICS_H
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#define LLVM_CODEGEN_MACHINE_TRACE_METRICS_H
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/TargetSchedule.h"
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namespace llvm {
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class InstrItineraryData;
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class MachineBasicBlock;
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class MachineInstr;
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class MachineLoop;
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class MachineLoopInfo;
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class MachineRegisterInfo;
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class TargetInstrInfo;
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class TargetRegisterInfo;
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class raw_ostream;
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class MachineTraceMetrics : public MachineFunctionPass {
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const MachineFunction *MF;
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const TargetInstrInfo *TII;
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const TargetRegisterInfo *TRI;
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const MachineRegisterInfo *MRI;
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const MachineLoopInfo *Loops;
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TargetSchedModel SchedModel;
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public:
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class Ensemble;
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class Trace;
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static char ID;
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MachineTraceMetrics();
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void getAnalysisUsage(AnalysisUsage&) const;
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bool runOnMachineFunction(MachineFunction&);
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void releaseMemory();
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void verifyAnalysis() const;
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friend class Ensemble;
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friend class Trace;
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/// Per-basic block information that doesn't depend on the trace through the
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/// block.
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struct FixedBlockInfo {
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/// The number of non-trivial instructions in the block.
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/// Doesn't count PHI and COPY instructions that are likely to be removed.
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unsigned InstrCount;
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/// True when the block contains calls.
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bool HasCalls;
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FixedBlockInfo() : InstrCount(~0u), HasCalls(false) {}
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/// Returns true when resource information for this block has been computed.
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bool hasResources() const { return InstrCount != ~0u; }
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/// Invalidate resource information.
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void invalidate() { InstrCount = ~0u; }
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};
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/// Get the fixed resource information about MBB. Compute it on demand.
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const FixedBlockInfo *getResources(const MachineBasicBlock*);
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/// A virtual register or regunit required by a basic block or its trace
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/// successors.
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struct LiveInReg {
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/// The virtual register required, or a register unit.
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unsigned Reg;
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/// For virtual registers: Minimum height of the defining instruction.
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/// For regunits: Height of the highest user in the trace.
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unsigned Height;
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LiveInReg(unsigned Reg, unsigned Height = 0) : Reg(Reg), Height(Height) {}
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};
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/// Per-basic block information that relates to a specific trace through the
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/// block. Convergent traces means that only one of these is required per
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/// block in a trace ensemble.
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struct TraceBlockInfo {
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/// Trace predecessor, or NULL for the first block in the trace.
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/// Valid when hasValidDepth().
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const MachineBasicBlock *Pred;
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/// Trace successor, or NULL for the last block in the trace.
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/// Valid when hasValidHeight().
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const MachineBasicBlock *Succ;
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/// The block number of the head of the trace. (When hasValidDepth()).
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unsigned Head;
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/// The block number of the tail of the trace. (When hasValidHeight()).
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unsigned Tail;
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/// Accumulated number of instructions in the trace above this block.
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/// Does not include instructions in this block.
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unsigned InstrDepth;
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/// Accumulated number of instructions in the trace below this block.
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/// Includes instructions in this block.
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unsigned InstrHeight;
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TraceBlockInfo() :
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Pred(0), Succ(0),
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InstrDepth(~0u), InstrHeight(~0u),
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HasValidInstrDepths(false), HasValidInstrHeights(false) {}
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/// Returns true if the depth resources have been computed from the trace
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/// above this block.
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bool hasValidDepth() const { return InstrDepth != ~0u; }
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/// Returns true if the height resources have been computed from the trace
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/// below this block.
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bool hasValidHeight() const { return InstrHeight != ~0u; }
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/// Invalidate depth resources when some block above this one has changed.
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void invalidateDepth() { InstrDepth = ~0u; HasValidInstrDepths = false; }
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/// Invalidate height resources when a block below this one has changed.
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void invalidateHeight() { InstrHeight = ~0u; HasValidInstrHeights = false; }
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/// Determine if this block belongs to the same trace as TBI and comes
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/// before it in the trace.
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/// Also returns true when TBI == this.
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bool isEarlierInSameTrace(const TraceBlockInfo &TBI) const {
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return hasValidDepth() && TBI.hasValidDepth() &&
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Head == TBI.Head && InstrDepth <= TBI.InstrDepth;
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}
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// Data-dependency-related information. Per-instruction depth and height
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// are computed from data dependencies in the current trace, using
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// itinerary data.
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/// Instruction depths have been computed. This implies hasValidDepth().
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bool HasValidInstrDepths;
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/// Instruction heights have been computed. This implies hasValidHeight().
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bool HasValidInstrHeights;
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/// Critical path length. This is the number of cycles in the longest data
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/// dependency chain through the trace. This is only valid when both
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/// HasValidInstrDepths and HasValidInstrHeights are set.
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unsigned CriticalPath;
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/// Live-in registers. These registers are defined above the current block
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/// and used by this block or a block below it.
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/// This does not include PHI uses in the current block, but it does
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/// include PHI uses in deeper blocks.
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SmallVector<LiveInReg, 4> LiveIns;
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void print(raw_ostream&) const;
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};
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/// InstrCycles represents the cycle height and depth of an instruction in a
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/// trace.
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struct InstrCycles {
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/// Earliest issue cycle as determined by data dependencies and instruction
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/// latencies from the beginning of the trace. Data dependencies from
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/// before the trace are not included.
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unsigned Depth;
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/// Minimum number of cycles from this instruction is issued to the of the
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/// trace, as determined by data dependencies and instruction latencies.
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unsigned Height;
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};
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/// A trace represents a plausible sequence of executed basic blocks that
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/// passes through the current basic block one. The Trace class serves as a
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/// handle to internal cached data structures.
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class Trace {
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Ensemble &TE;
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TraceBlockInfo &TBI;
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unsigned getBlockNum() const { return &TBI - &TE.BlockInfo[0]; }
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public:
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explicit Trace(Ensemble &te, TraceBlockInfo &tbi) : TE(te), TBI(tbi) {}
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void print(raw_ostream&) const;
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/// Compute the total number of instructions in the trace.
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unsigned getInstrCount() const {
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return TBI.InstrDepth + TBI.InstrHeight;
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}
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/// Return the resource depth of the top/bottom of the trace center block.
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/// This is the number of cycles required to execute all instructions from
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/// the trace head to the trace center block. The resource depth only
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/// considers execution resources, it ignores data dependencies.
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/// When Bottom is set, instructions in the trace center block are included.
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unsigned getResourceDepth(bool Bottom) const;
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/// Return the resource length of the trace. This is the number of cycles
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/// required to execute the instructions in the trace if they were all
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/// independent, exposing the maximum instruction-level parallelism.
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///
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/// Any blocks in Extrablocks are included as if they were part of the
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/// trace.
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unsigned getResourceLength(ArrayRef<const MachineBasicBlock*> Extrablocks =
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ArrayRef<const MachineBasicBlock*>()) const;
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/// Return the length of the (data dependency) critical path through the
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/// trace.
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unsigned getCriticalPath() const { return TBI.CriticalPath; }
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/// Return the depth and height of MI. The depth is only valid for
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/// instructions in or above the trace center block. The height is only
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/// valid for instructions in or below the trace center block.
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InstrCycles getInstrCycles(const MachineInstr *MI) const {
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return TE.Cycles.lookup(MI);
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}
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/// Return the slack of MI. This is the number of cycles MI can be delayed
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/// before the critical path becomes longer.
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/// MI must be an instruction in the trace center block.
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unsigned getInstrSlack(const MachineInstr *MI) const;
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/// Return the Depth of a PHI instruction in a trace center block successor.
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/// The PHI does not have to be part of the trace.
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unsigned getPHIDepth(const MachineInstr *PHI) const;
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};
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/// A trace ensemble is a collection of traces selected using the same
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/// strategy, for example 'minimum resource height'. There is one trace for
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/// every block in the function.
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class Ensemble {
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SmallVector<TraceBlockInfo, 4> BlockInfo;
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DenseMap<const MachineInstr*, InstrCycles> Cycles;
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friend class Trace;
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void computeTrace(const MachineBasicBlock*);
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void computeDepthResources(const MachineBasicBlock*);
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void computeHeightResources(const MachineBasicBlock*);
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unsigned computeCrossBlockCriticalPath(const TraceBlockInfo&);
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void computeInstrDepths(const MachineBasicBlock*);
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void computeInstrHeights(const MachineBasicBlock*);
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void addLiveIns(const MachineInstr *DefMI, unsigned DefOp,
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ArrayRef<const MachineBasicBlock*> Trace);
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protected:
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MachineTraceMetrics &MTM;
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virtual const MachineBasicBlock *pickTracePred(const MachineBasicBlock*) =0;
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virtual const MachineBasicBlock *pickTraceSucc(const MachineBasicBlock*) =0;
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explicit Ensemble(MachineTraceMetrics*);
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const MachineLoop *getLoopFor(const MachineBasicBlock*) const;
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const TraceBlockInfo *getDepthResources(const MachineBasicBlock*) const;
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const TraceBlockInfo *getHeightResources(const MachineBasicBlock*) const;
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public:
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virtual ~Ensemble();
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virtual const char *getName() const =0;
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void print(raw_ostream&) const;
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void invalidate(const MachineBasicBlock *MBB);
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void verify() const;
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/// Get the trace that passes through MBB.
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/// The trace is computed on demand.
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Trace getTrace(const MachineBasicBlock *MBB);
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};
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/// Strategies for selecting traces.
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enum Strategy {
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/// Select the trace through a block that has the fewest instructions.
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TS_MinInstrCount,
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TS_NumStrategies
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};
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/// Get the trace ensemble representing the given trace selection strategy.
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/// The returned Ensemble object is owned by the MachineTraceMetrics analysis,
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/// and valid for the lifetime of the analysis pass.
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Ensemble *getEnsemble(Strategy);
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/// Invalidate cached information about MBB. This must be called *before* MBB
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/// is erased, or the CFG is otherwise changed.
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///
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/// This invalidates per-block information about resource usage for MBB only,
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/// and it invalidates per-trace information for any trace that passes
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/// through MBB.
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///
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/// Call Ensemble::getTrace() again to update any trace handles.
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void invalidate(const MachineBasicBlock *MBB);
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private:
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// One entry per basic block, indexed by block number.
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SmallVector<FixedBlockInfo, 4> BlockInfo;
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// One ensemble per strategy.
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Ensemble* Ensembles[TS_NumStrategies];
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};
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inline raw_ostream &operator<<(raw_ostream &OS,
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const MachineTraceMetrics::Trace &Tr) {
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Tr.print(OS);
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return OS;
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}
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inline raw_ostream &operator<<(raw_ostream &OS,
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const MachineTraceMetrics::Ensemble &En) {
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En.print(OS);
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return OS;
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}
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} // end namespace llvm
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#endif
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