llvm-6502/test/CodeGen
Tim Northover 876dd978b8 ARM: recommit r237590: allow jump tables to be placed as constant islands.
The original version didn't properly account for the base register
being modified before the final jump, so caused miscompilations in
Chromium and LLVM. I've fixed this and tested with an LLVM self-host
(I don't have the means to build & test Chromium).

The general idea remains the same: in pathological cases jump tables
can be too far away from the instructions referencing them (like other
constants) so they need to be movable.

Should fix PR23627.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238680 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-31 19:22:07 +00:00
..
AArch64 Revert "Re-commit changes in r237579 with fix for bug breaking windows builds." 2015-05-26 17:45:38 +00:00
ARM ARM: recommit r237590: allow jump tables to be placed as constant islands. 2015-05-31 19:22:07 +00:00
BPF [opaque pointer type] Add textual IR support for explicit type parameter to the call instruction 2015-04-16 23:24:18 +00:00
CPP [opaque pointer type] Add textual IR support for explicit type parameter to the call instruction 2015-04-16 23:24:18 +00:00
Generic Resubmit r237954 (MIR Serialization: print and parse LLVM IR using MIR format). 2015-05-27 18:02:19 +00:00
Hexagon [Hexagon] Disassembling, printing, and emitting instructions a whole-bundle at a time which is the semantic unit for Hexagon. Fixing tests to use the new format. Disabling tests in the direct object emission path for a followup patch. 2015-05-29 14:44:13 +00:00
Inputs IR: Give 'DI' prefix to debug info metadata 2015-04-29 16:38:44 +00:00
Mips Revert r238427 - [mips] Make TTypeEncoding indirect to allow .eh_frame to be read-only. 2015-05-28 20:30:32 +00:00
MIR MIR Serialization: use correct line and column numbers for LLVM IR errors. 2015-05-29 17:05:41 +00:00
MSP430
NVPTX [NVPTXFavorNonGenericAddrSpaces] recursively trace into GEP and BitCast 2015-05-29 17:00:27 +00:00
PowerPC Add support for VSX FMA single-precision instructions to the PPC back end 2015-05-29 17:13:25 +00:00
R600 R600: Use SIGN_EXTEND_INREG for SEXT loads 2015-05-26 18:07:22 +00:00
SPARC Add support for the Sparc implementation-defined "ASR" registers. 2015-05-18 16:29:48 +00:00
SystemZ [DAGCombiner] Account for getVectorIdxTy() when narrowing vector load 2015-05-05 19:34:10 +00:00
Thumb Thumb2: Modify codegen for memcpy intrinsic to prefer LDM/STM. 2015-05-28 20:02:45 +00:00
Thumb2 ARM: recommit r237590: allow jump tables to be placed as constant islands. 2015-05-31 19:22:07 +00:00
WinEH [WinEH] C++ EH state numbering fixes 2015-05-20 23:22:24 +00:00
X86 [x86] Unify the horizontal adding used for popcount lowering taking the 2015-05-30 10:35:03 +00:00
XCore IR: Give 'DI' prefix to debug info metadata 2015-04-29 16:38:44 +00:00