Simon Pilgrim 87d1836793 [X86][SSE] Improve support for 128-bit vector sign extension ... This patch improves support for sign extension of the lower lanes of vectors of integers by making use of the SSE41 pmovsx* sign extension instructions where possible, and optimizing the sign extension by shifts on pre-SSE41 targets (avoiding the use of i64 arithmetic shifts which require scalarization). It converts SIGN_EXTEND nodes to SIGN_EXTEND_VECTOR_INREG where necessary, that more closely matches the pmovsx* instruction than the default approach of using SIGN_EXTEND_INREG which splits the operation (into an ANY_EXTEND lowered to a shuffle followed by shifts) making instruction matching difficult during lowering. Necessary support for SIGN_EXTEND_VECTOR_INREG has been added to the DAGCombiner. Differential Revision: http://reviews.llvm.org/D9848 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237885 91177308-0d34-0410-b5e6-96231b3b80d8		2015-05-21 10:05:03 +00:00
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AArch64
ARM	[Target/ARM] Only enable OptimizeBarrierPass at -O1 and above.	2015-05-20 21:40:38 +00:00
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Generic	Fix icmp lowering	2015-05-20 17:21:09 +00:00
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WinEH	[WinEH] C++ EH state numbering fixes	2015-05-20 23:22:24 +00:00
X86	[X86][SSE] Improve support for 128-bit vector sign extension	2015-05-21 10:05:03 +00:00
XCore