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https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
34 lines
1.3 KiB
LLVM
34 lines
1.3 KiB
LLVM
; RUN: llc -mtriple=thumbv7-apple-ios -disable-block-placement < %s | FileCheck %s
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; RUN: llc -mtriple=armv7-apple-ios -disable-block-placement < %s | FileCheck %s
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; LSR should compare against the post-incremented induction variable.
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; In this case, the immediate value is -2 which requires a cmn instruction.
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;
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; CHECK-LABEL: f:
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; CHECK: %for.body
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; CHECK: sub{{.*}}[[IV:r[0-9]+]], #2
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; CHECK: cmn{{.*}}[[IV]], #2
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; CHECK: bne
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define i32 @f(i32* nocapture %a, i32 %i) nounwind readonly ssp {
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entry:
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%cmp3 = icmp eq i32 %i, -2
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br i1 %cmp3, label %for.end, label %for.body
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for.body: ; preds = %entry, %for.body
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%bi.06 = phi i32 [ %i.addr.0.bi.0, %for.body ], [ 0, %entry ]
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%i.addr.05 = phi i32 [ %sub, %for.body ], [ %i, %entry ]
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%b.04 = phi i32 [ %.b.0, %for.body ], [ 0, %entry ]
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%arrayidx = getelementptr inbounds i32, i32* %a, i32 %i.addr.05
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%0 = load i32, i32* %arrayidx, align 4
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%cmp1 = icmp sgt i32 %0, %b.04
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%.b.0 = select i1 %cmp1, i32 %0, i32 %b.04
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%i.addr.0.bi.0 = select i1 %cmp1, i32 %i.addr.05, i32 %bi.06
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%sub = add nsw i32 %i.addr.05, -2
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%cmp = icmp eq i32 %i.addr.05, 0
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br i1 %cmp, label %for.end, label %for.body
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for.end: ; preds = %for.body, %entry
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%bi.0.lcssa = phi i32 [ 0, %entry ], [ %i.addr.0.bi.0, %for.body ]
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ret i32 %bi.0.lcssa
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}
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