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cafa378fe0
We currently try to push an even number of registers to preserve 8-byte alignment during a function's prologue, but only when the stack alignment is prcisely 8. Many of the reasons for doing it apply also when that alignment > 8 (the extra store is often free, and can save another stack adjustment, though less frequently for 16-byte stack alignment). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221321 91177308-0d34-0410-b5e6-96231b3b80d8
32 lines
1.1 KiB
LLVM
32 lines
1.1 KiB
LLVM
; RUN: llc < %s -mtriple=arm-nacl-gnueabi | FileCheck %s
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declare void @llvm.va_start(i8*)
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declare void @external_func(i8*)
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@va_list = external global i8*
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; On ARM, varargs arguments are passed in r0-r3 with the rest on the
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; stack. A varargs function must therefore spill rN-r3 just below the
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; function's initial stack pointer.
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;
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; This test checks for a bug in which a gap was left between the spill
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; area and varargs arguments on the stack when using 16 byte stack
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; alignment.
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define void @varargs_func(i32 %arg1, ...) {
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call void @llvm.va_start(i8* bitcast (i8** @va_list to i8*))
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call void @external_func(i8* bitcast (i8** @va_list to i8*))
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ret void
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}
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; CHECK-LABEL: varargs_func:
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; Reserve space for the varargs save area. This currently reserves
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; more than enough (16 bytes rather than the 12 bytes needed).
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; CHECK: sub sp, sp, #16
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; CHECK: push {r11, lr}
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; Align the stack pointer to a multiple of 16.
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; CHECK: sub sp, sp, #8
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; Calculate the address of the varargs save area and save varargs
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; arguments into it.
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; CHECK-NEXT: add r0, sp, #20
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; CHECK-NEXT: stm r0, {r1, r2, r3}
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