mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-21 18:29:45 +00:00
7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
110 lines
5.0 KiB
LLVM
110 lines
5.0 KiB
LLVM
; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s
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%struct.__neon_int8x8x2_t = type { <8 x i8>, <8 x i8> }
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%struct.__neon_int8x8x3_t = type { <8 x i8>, <8 x i8>, <8 x i8> }
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%struct.__neon_int8x8x4_t = type { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> }
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define <8 x i8> @vtbl1(<8 x i8>* %A, <8 x i8>* %B) nounwind {
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;CHECK-LABEL: vtbl1:
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;CHECK: vtbl.8
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%tmp1 = load <8 x i8>, <8 x i8>* %A
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%tmp2 = load <8 x i8>, <8 x i8>* %B
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%tmp3 = call <8 x i8> @llvm.arm.neon.vtbl1(<8 x i8> %tmp1, <8 x i8> %tmp2)
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ret <8 x i8> %tmp3
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}
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define <8 x i8> @vtbl2(<8 x i8>* %A, %struct.__neon_int8x8x2_t* %B) nounwind {
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;CHECK-LABEL: vtbl2:
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;CHECK: vtbl.8
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%tmp1 = load <8 x i8>, <8 x i8>* %A
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%tmp2 = load %struct.__neon_int8x8x2_t, %struct.__neon_int8x8x2_t* %B
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%tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 0
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%tmp4 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 1
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%tmp5 = call <8 x i8> @llvm.arm.neon.vtbl2(<8 x i8> %tmp1, <8 x i8> %tmp3, <8 x i8> %tmp4)
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ret <8 x i8> %tmp5
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}
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define <8 x i8> @vtbl3(<8 x i8>* %A, %struct.__neon_int8x8x3_t* %B) nounwind {
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;CHECK-LABEL: vtbl3:
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;CHECK: vtbl.8
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%tmp1 = load <8 x i8>, <8 x i8>* %A
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%tmp2 = load %struct.__neon_int8x8x3_t, %struct.__neon_int8x8x3_t* %B
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%tmp3 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 0
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%tmp4 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 1
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%tmp5 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 2
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%tmp6 = call <8 x i8> @llvm.arm.neon.vtbl3(<8 x i8> %tmp1, <8 x i8> %tmp3, <8 x i8> %tmp4, <8 x i8> %tmp5)
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ret <8 x i8> %tmp6
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}
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define <8 x i8> @vtbl4(<8 x i8>* %A, %struct.__neon_int8x8x4_t* %B) nounwind {
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;CHECK-LABEL: vtbl4:
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;CHECK: vtbl.8
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%tmp1 = load <8 x i8>, <8 x i8>* %A
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%tmp2 = load %struct.__neon_int8x8x4_t, %struct.__neon_int8x8x4_t* %B
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%tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 0
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%tmp4 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 1
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%tmp5 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 2
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%tmp6 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 3
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%tmp7 = call <8 x i8> @llvm.arm.neon.vtbl4(<8 x i8> %tmp1, <8 x i8> %tmp3, <8 x i8> %tmp4, <8 x i8> %tmp5, <8 x i8> %tmp6)
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ret <8 x i8> %tmp7
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}
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define <8 x i8> @vtbx1(<8 x i8>* %A, <8 x i8>* %B, <8 x i8>* %C) nounwind {
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;CHECK-LABEL: vtbx1:
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;CHECK: vtbx.8
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%tmp1 = load <8 x i8>, <8 x i8>* %A
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%tmp2 = load <8 x i8>, <8 x i8>* %B
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%tmp3 = load <8 x i8>, <8 x i8>* %C
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%tmp4 = call <8 x i8> @llvm.arm.neon.vtbx1(<8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i8> %tmp3)
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ret <8 x i8> %tmp4
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}
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define <8 x i8> @vtbx2(<8 x i8>* %A, %struct.__neon_int8x8x2_t* %B, <8 x i8>* %C) nounwind {
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;CHECK-LABEL: vtbx2:
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;CHECK: vtbx.8
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%tmp1 = load <8 x i8>, <8 x i8>* %A
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%tmp2 = load %struct.__neon_int8x8x2_t, %struct.__neon_int8x8x2_t* %B
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%tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 0
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%tmp4 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 1
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%tmp5 = load <8 x i8>, <8 x i8>* %C
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%tmp6 = call <8 x i8> @llvm.arm.neon.vtbx2(<8 x i8> %tmp1, <8 x i8> %tmp3, <8 x i8> %tmp4, <8 x i8> %tmp5)
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ret <8 x i8> %tmp6
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}
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define <8 x i8> @vtbx3(<8 x i8>* %A, %struct.__neon_int8x8x3_t* %B, <8 x i8>* %C) nounwind {
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;CHECK-LABEL: vtbx3:
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;CHECK: vtbx.8
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%tmp1 = load <8 x i8>, <8 x i8>* %A
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%tmp2 = load %struct.__neon_int8x8x3_t, %struct.__neon_int8x8x3_t* %B
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%tmp3 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 0
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%tmp4 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 1
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%tmp5 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 2
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%tmp6 = load <8 x i8>, <8 x i8>* %C
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%tmp7 = call <8 x i8> @llvm.arm.neon.vtbx3(<8 x i8> %tmp1, <8 x i8> %tmp3, <8 x i8> %tmp4, <8 x i8> %tmp5, <8 x i8> %tmp6)
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ret <8 x i8> %tmp7
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}
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define <8 x i8> @vtbx4(<8 x i8>* %A, %struct.__neon_int8x8x4_t* %B, <8 x i8>* %C) nounwind {
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;CHECK-LABEL: vtbx4:
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;CHECK: vtbx.8
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%tmp1 = load <8 x i8>, <8 x i8>* %A
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%tmp2 = load %struct.__neon_int8x8x4_t, %struct.__neon_int8x8x4_t* %B
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%tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 0
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%tmp4 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 1
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%tmp5 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 2
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%tmp6 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 3
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%tmp7 = load <8 x i8>, <8 x i8>* %C
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%tmp8 = call <8 x i8> @llvm.arm.neon.vtbx4(<8 x i8> %tmp1, <8 x i8> %tmp3, <8 x i8> %tmp4, <8 x i8> %tmp5, <8 x i8> %tmp6, <8 x i8> %tmp7)
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ret <8 x i8> %tmp8
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}
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declare <8 x i8> @llvm.arm.neon.vtbl1(<8 x i8>, <8 x i8>) nounwind readnone
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declare <8 x i8> @llvm.arm.neon.vtbl2(<8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone
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declare <8 x i8> @llvm.arm.neon.vtbl3(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone
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declare <8 x i8> @llvm.arm.neon.vtbl4(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone
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declare <8 x i8> @llvm.arm.neon.vtbx1(<8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone
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declare <8 x i8> @llvm.arm.neon.vtbx2(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone
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declare <8 x i8> @llvm.arm.neon.vtbx3(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone
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declare <8 x i8> @llvm.arm.neon.vtbx4(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone
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