llvm-6502/test/CodeGen/MSP430/inline-asm.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

27 lines
701 B
LLVM

; RUN: llc < %s
target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
target triple = "msp430-generic-generic"
define void @imm() nounwind {
call void asm sideeffect "bic\09$0,r2", "i"(i16 32) nounwind
ret void
}
define void @reg(i16 %a) nounwind {
call void asm sideeffect "bic\09$0,r2", "r"(i16 %a) nounwind
ret void
}
@foo = global i16 0, align 2
define void @immmem() nounwind {
call void asm sideeffect "bic\09$0,r2", "i"(i16* getelementptr(i16* @foo, i32 1)) nounwind
ret void
}
define void @mem() nounwind {
%fooval = load i16, i16* @foo
call void asm sideeffect "bic\09$0,r2", "m"(i16 %fooval) nounwind
ret void
}