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https://github.com/c64scene-ar/llvm-6502.git
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8c4e64af8a
If it's safe to clobber the condition flags, we can do a few extra things: it's then possible to reset the base register writeback using a SUBS, so we can try to merge even if the base register isn't dead after the merged instruction. This is effectively a (heavily bug-fixed) rewrite of r208992. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218386 91177308-0d34-0410-b5e6-96231b3b80d8
37 lines
1.2 KiB
LLVM
37 lines
1.2 KiB
LLVM
; RUN: llc -mtriple=thumbv6m-eabi -verify-machineinstrs %s -o - | FileCheck %s
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@d = external global [64 x i32]
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@s = external global [64 x i32]
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; Function Attrs: nounwind
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define void @t1() #0 {
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entry:
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; CHECK-LABEL: t1:
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; CHECK: ldr r[[LB:[0-9]]],
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; CHECK-NEXT: ldm r[[LB]]!,
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; CHECK-NEXT: ldr r[[SB:[0-9]]],
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; CHECK-NEXT: stm r[[SB]]!,
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; CHECK-NEXT: ldrb {{.*}}, [r[[LB]]]
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; CHECK-NEXT: strb {{.*}}, [r[[SB]]]
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tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* bitcast ([64 x i32]* @s to i8*), i8* bitcast ([64 x i32]* @d to i8*), i32 17, i32 4, i1 false)
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ret void
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}
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; Function Attrs: nounwind
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define void @t2() #0 {
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entry:
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; CHECK-LABEL: t2:
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; CHECK: ldr r[[LB:[0-9]]],
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; CHECK-NEXT: ldm r[[LB]]!,
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; CHECK-NEXT: ldr r[[SB:[0-9]]],
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; CHECK-NEXT: stm r[[SB]]!,
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; CHECK-NEXT: ldrh {{.*}}, [r[[LB]]]
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; CHECK-NEXT: ldrb {{.*}}, [r[[LB]], #2]
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; CHECK-NEXT: strb {{.*}}, [r[[SB]], #2]
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; CHECK-NEXT: strh {{.*}}, [r[[SB]]]
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tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* bitcast ([64 x i32]* @s to i8*), i8* bitcast ([64 x i32]* @d to i8*), i32 15, i32 4, i1 false)
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ret void
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}
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; Function Attrs: nounwind
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declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1) #1
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