mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-21 18:29:45 +00:00
26d628d6ce
Summary: Currently fast-isel-abort will only abort for regular instructions, and just warn for function calls, terminators, function arguments. There is already fast-isel-abort-args but nothing for calls and terminators. This change turns the fast-isel-abort options into an integer option, so that multiple levels of strictness can be defined. This will help no being surprised when the "abort" option indeed does not abort, and enables the possibility to write test that verifies that no intrinsics are forgotten by fast-isel. Reviewers: resistor, echristo Subscribers: jfb, llvm-commits Differential Revision: http://reviews.llvm.org/D7941 From: Mehdi Amini <mehdi.amini@apple.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230775 91177308-0d34-0410-b5e6-96231b3b80d8
139 lines
4.0 KiB
LLVM
139 lines
4.0 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=corei7-avx | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 -mcpu=corei7-avx | FileCheck %s
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define float @select_fcmp_one_f32(float %a, float %b, float %c, float %d) {
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; CHECK-LABEL: select_fcmp_one_f32
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; CHECK: ucomiss %xmm1, %xmm0
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; CHECK-NEXT: jne [[BB:LBB[0-9]+_2]]
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; CHECK: [[BB]]
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; CHECK-NEXT: movaps %xmm2, %xmm0
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%1 = fcmp one float %a, %b
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%2 = select i1 %1, float %c, float %d
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ret float %2
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}
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define double @select_fcmp_one_f64(double %a, double %b, double %c, double %d) {
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; CHECK-LABEL: select_fcmp_one_f64
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; CHECK: ucomisd %xmm1, %xmm0
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; CHECK-NEXT: jne [[BB:LBB[0-9]+_2]]
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; CHECK: [[BB]]
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; CHECK-NEXT: movaps %xmm2, %xmm0
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%1 = fcmp one double %a, %b
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%2 = select i1 %1, double %c, double %d
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ret double %2
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}
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define float @select_icmp_eq_f32(i64 %a, i64 %b, float %c, float %d) {
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; CHECK-LABEL: select_icmp_eq_f32
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; CHECK: cmpq %rsi, %rdi
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; CHECK-NEXT: je [[BB:LBB[0-9]+_2]]
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; CHECK: [[BB]]
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; CHECK-NEXT: retq
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%1 = icmp eq i64 %a, %b
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%2 = select i1 %1, float %c, float %d
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ret float %2
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}
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define float @select_icmp_ne_f32(i64 %a, i64 %b, float %c, float %d) {
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; CHECK-LABEL: select_icmp_ne_f32
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; CHECK: cmpq %rsi, %rdi
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; CHECK-NEXT: jne [[BB:LBB[0-9]+_2]]
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; CHECK: [[BB]]
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; CHECK-NEXT: retq
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%1 = icmp ne i64 %a, %b
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%2 = select i1 %1, float %c, float %d
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ret float %2
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}
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define float @select_icmp_ugt_f32(i64 %a, i64 %b, float %c, float %d) {
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; CHECK-LABEL: select_icmp_ugt_f32
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; CHECK: cmpq %rsi, %rdi
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; CHECK-NEXT: ja [[BB:LBB[0-9]+_2]]
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; CHECK: [[BB]]
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; CHECK-NEXT: retq
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%1 = icmp ugt i64 %a, %b
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%2 = select i1 %1, float %c, float %d
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ret float %2
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}
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define float @select_icmp_uge_f32(i64 %a, i64 %b, float %c, float %d) {
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; CHECK-LABEL: select_icmp_uge_f32
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; CHECK: cmpq %rsi, %rdi
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; CHECK-NEXT: jae [[BB:LBB[0-9]+_2]]
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; CHECK: [[BB]]
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; CHECK-NEXT: retq
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%1 = icmp uge i64 %a, %b
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%2 = select i1 %1, float %c, float %d
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ret float %2
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}
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define float @select_icmp_ult_f32(i64 %a, i64 %b, float %c, float %d) {
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; CHECK-LABEL: select_icmp_ult_f32
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; CHECK: cmpq %rsi, %rdi
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; CHECK-NEXT: jb [[BB:LBB[0-9]+_2]]
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; CHECK: [[BB]]
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; CHECK-NEXT: retq
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%1 = icmp ult i64 %a, %b
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%2 = select i1 %1, float %c, float %d
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ret float %2
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}
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define float @select_icmp_ule_f32(i64 %a, i64 %b, float %c, float %d) {
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; CHECK-LABEL: select_icmp_ule_f32
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; CHECK: cmpq %rsi, %rdi
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; CHECK-NEXT: jbe [[BB:LBB[0-9]+_2]]
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; CHECK: [[BB]]
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; CHECK-NEXT: retq
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%1 = icmp ule i64 %a, %b
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%2 = select i1 %1, float %c, float %d
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ret float %2
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}
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define float @select_icmp_sgt_f32(i64 %a, i64 %b, float %c, float %d) {
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; CHECK-LABEL: select_icmp_sgt_f32
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; CHECK: cmpq %rsi, %rdi
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; CHECK-NEXT: jg [[BB:LBB[0-9]+_2]]
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; CHECK: [[BB]]
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; CHECK-NEXT: retq
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%1 = icmp sgt i64 %a, %b
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%2 = select i1 %1, float %c, float %d
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ret float %2
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}
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define float @select_icmp_sge_f32(i64 %a, i64 %b, float %c, float %d) {
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; CHECK-LABEL: select_icmp_sge_f32
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; CHECK: cmpq %rsi, %rdi
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; CHECK-NEXT: jge [[BB:LBB[0-9]+_2]]
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; CHECK: [[BB]]
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; CHECK-NEXT: retq
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%1 = icmp sge i64 %a, %b
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%2 = select i1 %1, float %c, float %d
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ret float %2
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}
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define float @select_icmp_slt_f32(i64 %a, i64 %b, float %c, float %d) {
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; CHECK-LABEL: select_icmp_slt_f32
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; CHECK: cmpq %rsi, %rdi
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; CHECK-NEXT: jl [[BB:LBB[0-9]+_2]]
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; CHECK: [[BB]]
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; CHECK-NEXT: retq
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%1 = icmp slt i64 %a, %b
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%2 = select i1 %1, float %c, float %d
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ret float %2
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}
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define float @select_icmp_sle_f32(i64 %a, i64 %b, float %c, float %d) {
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; CHECK-LABEL: select_icmp_sle_f32
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; CHECK: cmpq %rsi, %rdi
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; CHECK-NEXT: jle [[BB:LBB[0-9]+_2]]
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; CHECK: [[BB]]
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; CHECK-NEXT: retq
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%1 = icmp sle i64 %a, %b
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%2 = select i1 %1, float %c, float %d
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ret float %2
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}
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