mirror of
https://github.com/c64scene-ar/llvm-6502.git
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62ba058dea
This patch attempts to convert a SCALAR_TO_VECTOR using an operand from an EXTRACT_VECTOR_ELT into a VECTOR_SHUFFLE. This prevents many cases of spilling scalar data between the gpr + simd registers. At present the optimization only accepts cases where there is no TRUNC of the scalar type (i.e. all types must match). Differential Revision: http://reviews.llvm.org/D8132 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231554 91177308-0d34-0410-b5e6-96231b3b80d8
55 lines
1.7 KiB
LLVM
55 lines
1.7 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X86-64
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;
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; On Darwin x86-64, v8i8, v4i16, v2i32 values are passed in XMM[0-7].
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; On Darwin x86-64, v1i64 values are passed in 64-bit GPRs.
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@g_v8qi = external global <8 x i8>
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define void @t3() nounwind {
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; X86-64-LABEL: t3:
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; X86-64: ## BB#0:
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; X86-64-NEXT: movq _g_v8qi@{{.*}}(%rip), %rax
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; X86-64-NEXT: movq {{.*#+}} xmm0 = mem[0],zero
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; X86-64-NEXT: movb $1, %al
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; X86-64-NEXT: jmp _pass_v8qi ## TAILCALL
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%tmp3 = load <8 x i8>, <8 x i8>* @g_v8qi, align 8
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%tmp3a = bitcast <8 x i8> %tmp3 to x86_mmx
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%tmp4 = tail call i32 (...)* @pass_v8qi( x86_mmx %tmp3a ) nounwind
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ret void
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}
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define void @t4(x86_mmx %v1, x86_mmx %v2) nounwind {
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; X86-64-LABEL: t4:
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; X86-64: ## BB#0:
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; X86-64-NEXT: movdq2q %xmm1, %mm0
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; X86-64-NEXT: movq %mm0, -{{[0-9]+}}(%rsp)
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; X86-64-NEXT: movdq2q %xmm0, %mm0
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; X86-64-NEXT: movq %mm0, -{{[0-9]+}}(%rsp)
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; X86-64-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
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; X86-64-NEXT: movq {{.*#+}} xmm0 = mem[0],zero
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; X86-64-NEXT: paddb %xmm1, %xmm0
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; X86-64-NEXT: movb $1, %al
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; X86-64-NEXT: jmp _pass_v8qi ## TAILCALL
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%v1a = bitcast x86_mmx %v1 to <8 x i8>
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%v2b = bitcast x86_mmx %v2 to <8 x i8>
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%tmp3 = add <8 x i8> %v1a, %v2b
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%tmp3a = bitcast <8 x i8> %tmp3 to x86_mmx
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%tmp4 = tail call i32 (...)* @pass_v8qi( x86_mmx %tmp3a ) nounwind
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ret void
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}
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define void @t5() nounwind {
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; X86-64-LABEL: t5:
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; X86-64: ## BB#0:
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; X86-64-NEXT: pushq %rax
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; X86-64-NEXT: xorl %edi, %edi
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; X86-64-NEXT: callq _pass_v1di
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; X86-64-NEXT: popq %rax
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; X86-64-NEXT: retq
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call void @pass_v1di( <1 x i64> zeroinitializer )
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ret void
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}
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declare i32 @pass_v8qi(...)
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declare void @pass_v1di(<1 x i64>)
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