Vladimir Medic d0fb85865a [Mips][Disassembler] When disassembler meets cache/pref instructions for r6 it crashes as the access to operands array is out of range. This patch adds dedicated decoder method for R6 CACHE_HINT_DESC class that properly handles decoding of these instructions. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227430 91177308-0d34-0410-b5e6-96231b3b80d8		2015-01-29 11:33:41 +00:00
..
AArch64
ARM	ARM: fail less catastrophically on invalid Windows input	2015-01-22 04:03:32 +00:00
AsmParser
COFF
Disassembler	[Mips][Disassembler] When disassembler meets cache/pref instructions for r6 it crashes as the access to operands array is out of range. This patch adds dedicated decoder method for R6 CACHE_HINT_DESC class that properly handles decoding of these instructions.	2015-01-29 11:33:41 +00:00
ELF	Revert llvm/test/MC/ELF/noexec.s in r227074, "Fix a problem where the AArch64 ELF assembler was failing with"	2015-01-26 09:30:29 +00:00
Hexagon
MachO	Add r224985 back with fixes.	2015-01-19 21:11:14 +00:00
Markup
Mips	[mips][microMIPS] Implement SWM and LWM aliases	2015-01-28 21:52:27 +00:00
PowerPC
R600
Sparc
SystemZ
X86	[x86] Change u8imm operands to always print as unsigned. This makes shuffle masks and the like make way more sense.	2015-01-23 08:00:59 +00:00