mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-25 14:32:53 +00:00
8f40f7b867
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159504 91177308-0d34-0410-b5e6-96231b3b80d8
358 lines
12 KiB
LLVM
358 lines
12 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 -mattr=+avx2 | FileCheck %s
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; CHECK: vpbroadcastb (%
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define <16 x i8> @BB16(i8* %ptr) nounwind uwtable readnone ssp {
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entry:
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%q = load i8* %ptr, align 4
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%q0 = insertelement <16 x i8> undef, i8 %q, i32 0
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%q1 = insertelement <16 x i8> %q0, i8 %q, i32 1
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%q2 = insertelement <16 x i8> %q1, i8 %q, i32 2
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%q3 = insertelement <16 x i8> %q2, i8 %q, i32 3
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%q4 = insertelement <16 x i8> %q3, i8 %q, i32 4
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%q5 = insertelement <16 x i8> %q4, i8 %q, i32 5
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%q6 = insertelement <16 x i8> %q5, i8 %q, i32 6
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%q7 = insertelement <16 x i8> %q6, i8 %q, i32 7
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%q8 = insertelement <16 x i8> %q7, i8 %q, i32 8
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%q9 = insertelement <16 x i8> %q8, i8 %q, i32 9
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%qa = insertelement <16 x i8> %q9, i8 %q, i32 10
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%qb = insertelement <16 x i8> %qa, i8 %q, i32 11
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%qc = insertelement <16 x i8> %qb, i8 %q, i32 12
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%qd = insertelement <16 x i8> %qc, i8 %q, i32 13
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%qe = insertelement <16 x i8> %qd, i8 %q, i32 14
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%qf = insertelement <16 x i8> %qe, i8 %q, i32 15
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ret <16 x i8> %qf
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}
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; CHECK: vpbroadcastb (%
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define <32 x i8> @BB32(i8* %ptr) nounwind uwtable readnone ssp {
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entry:
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%q = load i8* %ptr, align 4
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%q0 = insertelement <32 x i8> undef, i8 %q, i32 0
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%q1 = insertelement <32 x i8> %q0, i8 %q, i32 1
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%q2 = insertelement <32 x i8> %q1, i8 %q, i32 2
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%q3 = insertelement <32 x i8> %q2, i8 %q, i32 3
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%q4 = insertelement <32 x i8> %q3, i8 %q, i32 4
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%q5 = insertelement <32 x i8> %q4, i8 %q, i32 5
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%q6 = insertelement <32 x i8> %q5, i8 %q, i32 6
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%q7 = insertelement <32 x i8> %q6, i8 %q, i32 7
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%q8 = insertelement <32 x i8> %q7, i8 %q, i32 8
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%q9 = insertelement <32 x i8> %q8, i8 %q, i32 9
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%qa = insertelement <32 x i8> %q9, i8 %q, i32 10
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%qb = insertelement <32 x i8> %qa, i8 %q, i32 11
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%qc = insertelement <32 x i8> %qb, i8 %q, i32 12
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%qd = insertelement <32 x i8> %qc, i8 %q, i32 13
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%qe = insertelement <32 x i8> %qd, i8 %q, i32 14
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%qf = insertelement <32 x i8> %qe, i8 %q, i32 15
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%q20 = insertelement <32 x i8> %qf, i8 %q, i32 16
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%q21 = insertelement <32 x i8> %q20, i8 %q, i32 17
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%q22 = insertelement <32 x i8> %q21, i8 %q, i32 18
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%q23 = insertelement <32 x i8> %q22, i8 %q, i32 19
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%q24 = insertelement <32 x i8> %q23, i8 %q, i32 20
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%q25 = insertelement <32 x i8> %q24, i8 %q, i32 21
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%q26 = insertelement <32 x i8> %q25, i8 %q, i32 22
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%q27 = insertelement <32 x i8> %q26, i8 %q, i32 23
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%q28 = insertelement <32 x i8> %q27, i8 %q, i32 24
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%q29 = insertelement <32 x i8> %q28, i8 %q, i32 25
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%q2a = insertelement <32 x i8> %q29, i8 %q, i32 26
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%q2b = insertelement <32 x i8> %q2a, i8 %q, i32 27
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%q2c = insertelement <32 x i8> %q2b, i8 %q, i32 28
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%q2d = insertelement <32 x i8> %q2c, i8 %q, i32 29
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%q2e = insertelement <32 x i8> %q2d, i8 %q, i32 30
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%q2f = insertelement <32 x i8> %q2e, i8 %q, i32 31
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ret <32 x i8> %q2f
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}
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; CHECK: vpbroadcastw (%
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define <8 x i16> @W16(i16* %ptr) nounwind uwtable readnone ssp {
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entry:
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%q = load i16* %ptr, align 4
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%q0 = insertelement <8 x i16> undef, i16 %q, i32 0
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%q1 = insertelement <8 x i16> %q0, i16 %q, i32 1
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%q2 = insertelement <8 x i16> %q1, i16 %q, i32 2
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%q3 = insertelement <8 x i16> %q2, i16 %q, i32 3
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%q4 = insertelement <8 x i16> %q3, i16 %q, i32 4
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%q5 = insertelement <8 x i16> %q4, i16 %q, i32 5
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%q6 = insertelement <8 x i16> %q5, i16 %q, i32 6
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%q7 = insertelement <8 x i16> %q6, i16 %q, i32 7
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ret <8 x i16> %q7
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}
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; CHECK: vpbroadcastw (%
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define <16 x i16> @WW16(i16* %ptr) nounwind uwtable readnone ssp {
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entry:
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%q = load i16* %ptr, align 4
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%q0 = insertelement <16 x i16> undef, i16 %q, i32 0
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%q1 = insertelement <16 x i16> %q0, i16 %q, i32 1
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%q2 = insertelement <16 x i16> %q1, i16 %q, i32 2
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%q3 = insertelement <16 x i16> %q2, i16 %q, i32 3
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%q4 = insertelement <16 x i16> %q3, i16 %q, i32 4
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%q5 = insertelement <16 x i16> %q4, i16 %q, i32 5
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%q6 = insertelement <16 x i16> %q5, i16 %q, i32 6
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%q7 = insertelement <16 x i16> %q6, i16 %q, i32 7
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%q8 = insertelement <16 x i16> %q7, i16 %q, i32 8
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%q9 = insertelement <16 x i16> %q8, i16 %q, i32 9
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%qa = insertelement <16 x i16> %q9, i16 %q, i32 10
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%qb = insertelement <16 x i16> %qa, i16 %q, i32 11
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%qc = insertelement <16 x i16> %qb, i16 %q, i32 12
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%qd = insertelement <16 x i16> %qc, i16 %q, i32 13
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%qe = insertelement <16 x i16> %qd, i16 %q, i32 14
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%qf = insertelement <16 x i16> %qe, i16 %q, i32 15
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ret <16 x i16> %qf
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}
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; CHECK: vpbroadcastd (%
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define <4 x i32> @D32(i32* %ptr) nounwind uwtable readnone ssp {
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entry:
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%q = load i32* %ptr, align 4
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%q0 = insertelement <4 x i32> undef, i32 %q, i32 0
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%q1 = insertelement <4 x i32> %q0, i32 %q, i32 1
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%q2 = insertelement <4 x i32> %q1, i32 %q, i32 2
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%q3 = insertelement <4 x i32> %q2, i32 %q, i32 3
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ret <4 x i32> %q3
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}
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; CHECK: vpbroadcastd (%
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define <8 x i32> @DD32(i32* %ptr) nounwind uwtable readnone ssp {
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entry:
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%q = load i32* %ptr, align 4
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%q0 = insertelement <8 x i32> undef, i32 %q, i32 0
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%q1 = insertelement <8 x i32> %q0, i32 %q, i32 1
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%q2 = insertelement <8 x i32> %q1, i32 %q, i32 2
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%q3 = insertelement <8 x i32> %q2, i32 %q, i32 3
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%q4 = insertelement <8 x i32> %q3, i32 %q, i32 4
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%q5 = insertelement <8 x i32> %q4, i32 %q, i32 5
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%q6 = insertelement <8 x i32> %q5, i32 %q, i32 6
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%q7 = insertelement <8 x i32> %q6, i32 %q, i32 7
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ret <8 x i32> %q7
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}
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; CHECK: vpbroadcastq (%
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define <2 x i64> @Q64(i64* %ptr) nounwind uwtable readnone ssp {
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entry:
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%q = load i64* %ptr, align 4
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%q0 = insertelement <2 x i64> undef, i64 %q, i32 0
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%q1 = insertelement <2 x i64> %q0, i64 %q, i32 1
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ret <2 x i64> %q1
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}
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; CHECK: vpbroadcastq (%
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define <4 x i64> @QQ64(i64* %ptr) nounwind uwtable readnone ssp {
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entry:
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%q = load i64* %ptr, align 4
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%q0 = insertelement <4 x i64> undef, i64 %q, i32 0
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%q1 = insertelement <4 x i64> %q0, i64 %q, i32 1
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%q2 = insertelement <4 x i64> %q1, i64 %q, i32 2
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%q3 = insertelement <4 x i64> %q2, i64 %q, i32 3
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ret <4 x i64> %q3
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}
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; make sure that we still don't support broadcast double into 128-bit vector
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; this used to crash
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define <2 x double> @I(double* %ptr) nounwind uwtable readnone ssp {
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entry:
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%q = load double* %ptr, align 4
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%vecinit.i = insertelement <2 x double> undef, double %q, i32 0
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%vecinit2.i = insertelement <2 x double> %vecinit.i, double %q, i32 1
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ret <2 x double> %vecinit2.i
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}
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; CHECK: V111
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; CHECK: vpbroadcastd
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; CHECK: ret
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define <8 x i32> @V111(<8 x i32> %in) nounwind uwtable readnone ssp {
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entry:
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%g = add <8 x i32> %in, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
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ret <8 x i32> %g
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}
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; CHECK: V113
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; CHECK: vbroadcastss
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; CHECK: ret
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define <8 x float> @V113(<8 x float> %in) nounwind uwtable readnone ssp {
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entry:
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%g = fadd <8 x float> %in, <float 0xbf80000000000000, float 0xbf80000000000000, float 0xbf80000000000000, float 0xbf80000000000000, float 0xbf80000000000000, float 0xbf80000000000000, float 0xbf80000000000000, float 0xbf80000000000000>
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ret <8 x float> %g
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}
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; CHECK: _e2
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; CHECK: vbroadcastss
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; CHECK: ret
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define <4 x float> @_e2(float* %ptr) nounwind uwtable readnone ssp {
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%vecinit.i = insertelement <4 x float> undef, float 0xbf80000000000000, i32 0
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%vecinit2.i = insertelement <4 x float> %vecinit.i, float 0xbf80000000000000, i32 1
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%vecinit4.i = insertelement <4 x float> %vecinit2.i, float 0xbf80000000000000, i32 2
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%vecinit6.i = insertelement <4 x float> %vecinit4.i, float 0xbf80000000000000, i32 3
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ret <4 x float> %vecinit6.i
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}
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; CHECK: _e4
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; CHECK-NOT: broadcast
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; CHECK: ret
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define <8 x i8> @_e4(i8* %ptr) nounwind uwtable readnone ssp {
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%vecinit0.i = insertelement <8 x i8> undef, i8 52, i32 0
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%vecinit1.i = insertelement <8 x i8> %vecinit0.i, i8 52, i32 1
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%vecinit2.i = insertelement <8 x i8> %vecinit1.i, i8 52, i32 2
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%vecinit3.i = insertelement <8 x i8> %vecinit2.i, i8 52, i32 3
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%vecinit4.i = insertelement <8 x i8> %vecinit3.i, i8 52, i32 4
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%vecinit5.i = insertelement <8 x i8> %vecinit4.i, i8 52, i32 5
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%vecinit6.i = insertelement <8 x i8> %vecinit5.i, i8 52, i32 6
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%vecinit7.i = insertelement <8 x i8> %vecinit6.i, i8 52, i32 7
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ret <8 x i8> %vecinit7.i
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}
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define void @crash() nounwind alwaysinline {
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WGLoopsEntry:
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br i1 undef, label %ret, label %footer329VF
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footer329VF:
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%A.0.inVF = fmul float undef, 6.553600e+04
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%B.0.in407VF = fmul <8 x float> undef, <float 6.553600e+04, float 6.553600e+04, float 6.553600e+04, float 6.553600e+04, float 6.553600e+04, float 6.553600e+04, float 6.553600e+04, float 6.553600e+04>
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%A.0VF = fptosi float %A.0.inVF to i32
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%B.0408VF = fptosi <8 x float> %B.0.in407VF to <8 x i32>
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%0 = and <8 x i32> %B.0408VF, <i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535>
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%1 = and i32 %A.0VF, 65535
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%temp1098VF = insertelement <8 x i32> undef, i32 %1, i32 0
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%vector1099VF = shufflevector <8 x i32> %temp1098VF, <8 x i32> undef, <8 x i32> zeroinitializer
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br i1 undef, label %preload1201VF, label %footer349VF
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preload1201VF:
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br label %footer349VF
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footer349VF:
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%2 = mul nsw <8 x i32> undef, %0
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%3 = mul nsw <8 x i32> undef, %vector1099VF
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br label %footer329VF
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ret:
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ret void
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}
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; CHECK: _inreg0
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; CHECK: broadcastss
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; CHECK: ret
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define <8 x i32> @_inreg0(i32 %scalar) nounwind uwtable readnone ssp {
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%in = insertelement <8 x i32> undef, i32 %scalar, i32 0
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%wide = shufflevector <8 x i32> %in, <8 x i32> undef, <8 x i32> zeroinitializer
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ret <8 x i32> %wide
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}
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; CHECK: _inreg1
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; CHECK: broadcastss
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; CHECK: ret
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define <8 x float> @_inreg1(float %scalar) nounwind uwtable readnone ssp {
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%in = insertelement <8 x float> undef, float %scalar, i32 0
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%wide = shufflevector <8 x float> %in, <8 x float> undef, <8 x i32> zeroinitializer
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ret <8 x float> %wide
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}
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; CHECK: _inreg2
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; CHECK: broadcastss
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; CHECK: ret
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define <4 x float> @_inreg2(float %scalar) nounwind uwtable readnone ssp {
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%in = insertelement <4 x float> undef, float %scalar, i32 0
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%wide = shufflevector <4 x float> %in, <4 x float> undef, <4 x i32> zeroinitializer
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ret <4 x float> %wide
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}
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; CHECK: _inreg3
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; CHECK: broadcastsd
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; CHECK: ret
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define <4 x double> @_inreg3(double %scalar) nounwind uwtable readnone ssp {
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%in = insertelement <4 x double> undef, double %scalar, i32 0
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%wide = shufflevector <4 x double> %in, <4 x double> undef, <4 x i32> zeroinitializer
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ret <4 x double> %wide
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}
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;CHECK: _inreg8xfloat
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;CHECK: vbroadcastss
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;CHECK: ret
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define <8 x float> @_inreg8xfloat(<8 x float> %a) {
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%b = shufflevector <8 x float> %a, <8 x float> undef, <8 x i32> zeroinitializer
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ret <8 x float> %b
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}
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;CHECK: _inreg4xfloat
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;CHECK: vbroadcastss
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;CHECK: ret
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define <4 x float> @_inreg4xfloat(<4 x float> %a) {
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%b = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> zeroinitializer
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ret <4 x float> %b
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}
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;CHECK: _inreg16xi16
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;CHECK: vpbroadcastw
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;CHECK: ret
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define <16 x i16> @_inreg16xi16(<16 x i16> %a) {
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%b = shufflevector <16 x i16> %a, <16 x i16> undef, <16 x i32> zeroinitializer
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ret <16 x i16> %b
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}
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;CHECK: _inreg8xi16
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;CHECK: vpbroadcastw
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;CHECK: ret
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define <8 x i16> @_inreg8xi16(<8 x i16> %a) {
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%b = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> zeroinitializer
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ret <8 x i16> %b
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}
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;CHECK: _inreg4xi64
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;CHECK: vpbroadcastq
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;CHECK: ret
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define <4 x i64> @_inreg4xi64(<4 x i64> %a) {
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%b = shufflevector <4 x i64> %a, <4 x i64> undef, <4 x i32> zeroinitializer
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ret <4 x i64> %b
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}
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;CHECK: _inreg2xi64
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;CHECK: vpbroadcastq
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;CHECK: ret
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define <2 x i64> @_inreg2xi64(<2 x i64> %a) {
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%b = shufflevector <2 x i64> %a, <2 x i64> undef, <2 x i32> zeroinitializer
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ret <2 x i64> %b
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}
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;CHECK: _inreg4xdouble
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;CHECK: vbroadcastsd
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;CHECK: ret
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define <4 x double> @_inreg4xdouble(<4 x double> %a) {
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%b = shufflevector <4 x double> %a, <4 x double> undef, <4 x i32> zeroinitializer
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ret <4 x double> %b
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}
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;CHECK: _inreg2xdouble
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;CHECK: vpbroadcastq
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;CHECK: ret
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define <2 x double> @_inreg2xdouble(<2 x double> %a) {
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%b = shufflevector <2 x double> %a, <2 x double> undef, <2 x i32> zeroinitializer
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ret <2 x double> %b
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}
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;CHECK: _inreg8xi32
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;CHECK: vpbroadcastd
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;CHECK: ret
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define <8 x i32> @_inreg8xi32(<8 x i32> %a) {
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%b = shufflevector <8 x i32> %a, <8 x i32> undef, <8 x i32> zeroinitializer
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ret <8 x i32> %b
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}
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;CHECK: _inreg4xi32
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;CHECK: vpbroadcastd
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;CHECK: ret
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define <4 x i32> @_inreg4xi32(<4 x i32> %a) {
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%b = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> zeroinitializer
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ret <4 x i32> %b
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}
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;CHECK: _inreg32xi8
|
|
;CHECK: vpbroadcastb
|
|
;CHECK: ret
|
|
define <32 x i8> @_inreg32xi8(<32 x i8> %a) {
|
|
%b = shufflevector <32 x i8> %a, <32 x i8> undef, <32 x i32> zeroinitializer
|
|
ret <32 x i8> %b
|
|
}
|
|
|
|
;CHECK: _inreg16xi8
|
|
;CHECK: vpbroadcastb
|
|
;CHECK: ret
|
|
define <16 x i8> @_inreg16xi8(<16 x i8> %a) {
|
|
%b = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> zeroinitializer
|
|
ret <16 x i8> %b
|
|
}
|