llvm-6502/lib/Target/Alpha
Bill Wendling 587daedce2 Change MachineInstrBuilder::addReg() to take a flag instead of a list of
booleans. This gives a better indication of what the "addReg()" is
doing. Remembering what all of those booleans mean isn't easy, especially if you
aren't spending all of your time in that code.

I took Jakob's suggestion and made it illegal to pass in "true" for the
flag. This should hopefully prevent any unintended misuse of this (by reverting
to the old way of using addReg()).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71722 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-13 21:33:08 +00:00
..
AsmPrinter Rename PaddedSize to AllocSize, in the hope that this 2009-05-09 07:06:46 +00:00
Alpha.h Instead of passing in an unsigned value for the optimization level, use an enum, 2009-04-29 23:29:43 +00:00
Alpha.td
AlphaBranchSelector.cpp
AlphaCodeEmitter.cpp
AlphaInstrFormats.td
AlphaInstrInfo.cpp Change MachineInstrBuilder::addReg() to take a flag instead of a list of 2009-05-13 21:33:08 +00:00
AlphaInstrInfo.h
AlphaInstrInfo.td Add an int64_t variant of abs, for host environments 2009-05-13 00:24:22 +00:00
AlphaISelDAGToDAG.cpp
AlphaISelLowering.cpp
AlphaISelLowering.h
AlphaJITInfo.cpp
AlphaJITInfo.h
AlphaLLRP.cpp
AlphaRegisterInfo.cpp
AlphaRegisterInfo.h
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td
AlphaSubtarget.cpp
AlphaSubtarget.h
AlphaTargetAsmInfo.cpp
AlphaTargetAsmInfo.h
AlphaTargetMachine.cpp Instead of passing in an unsigned value for the optimization level, use an enum, 2009-04-29 23:29:43 +00:00
AlphaTargetMachine.h Instead of passing in an unsigned value for the optimization level, use an enum, 2009-04-29 23:29:43 +00:00
CMakeLists.txt
Makefile
README.txt

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html