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https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
27 lines
1.1 KiB
LLVM
27 lines
1.1 KiB
LLVM
; REQUIRES: asserts
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; RUN: llc < %s -march=x86 -relocation-model=static -stats 2>&1 | \
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; RUN: grep asm-printer | grep 16
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;
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; It's possible to schedule this in 14 instructions by avoiding
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; callee-save registers, but the scheduler isn't currently that
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; conervative with registers.
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@size20 = external global i32 ; <i32*> [#uses=1]
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@in5 = external global i8* ; <i8**> [#uses=1]
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define i32 @compare(i8* %a, i8* %b) nounwind {
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%tmp = bitcast i8* %a to i32* ; <i32*> [#uses=1]
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%tmp1 = bitcast i8* %b to i32* ; <i32*> [#uses=1]
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%tmp.upgrd.1 = load i32, i32* @size20 ; <i32> [#uses=1]
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%tmp.upgrd.2 = load i8*, i8** @in5 ; <i8*> [#uses=2]
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%tmp3 = load i32, i32* %tmp1 ; <i32> [#uses=1]
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%gep.upgrd.3 = zext i32 %tmp3 to i64 ; <i64> [#uses=1]
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%tmp4 = getelementptr i8, i8* %tmp.upgrd.2, i64 %gep.upgrd.3 ; <i8*> [#uses=2]
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%tmp7 = load i32, i32* %tmp ; <i32> [#uses=1]
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%gep.upgrd.4 = zext i32 %tmp7 to i64 ; <i64> [#uses=1]
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%tmp8 = getelementptr i8, i8* %tmp.upgrd.2, i64 %gep.upgrd.4 ; <i8*> [#uses=2]
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%tmp.upgrd.5 = tail call i32 @memcmp( i8* %tmp8, i8* %tmp4, i32 %tmp.upgrd.1 ) ; <i32> [#uses=1]
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ret i32 %tmp.upgrd.5
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}
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declare i32 @memcmp(i8*, i8*, i32)
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