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https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
86 lines
2.9 KiB
LLVM
86 lines
2.9 KiB
LLVM
; RUN: llc < %s -tailcallopt -mtriple=x86_64-linux-gnu | FileCheck %s
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; Check the GHC call convention works (x86-64)
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@base = external global i64 ; assigned to register: R13
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@sp = external global i64 ; assigned to register: RBP
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@hp = external global i64 ; assigned to register: R12
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@r1 = external global i64 ; assigned to register: RBX
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@r2 = external global i64 ; assigned to register: R14
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@r3 = external global i64 ; assigned to register: RSI
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@r4 = external global i64 ; assigned to register: RDI
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@r5 = external global i64 ; assigned to register: R8
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@r6 = external global i64 ; assigned to register: R9
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@splim = external global i64 ; assigned to register: R15
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@f1 = external global float ; assigned to register: XMM1
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@f2 = external global float ; assigned to register: XMM2
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@f3 = external global float ; assigned to register: XMM3
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@f4 = external global float ; assigned to register: XMM4
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@d1 = external global double ; assigned to register: XMM5
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@d2 = external global double ; assigned to register: XMM6
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define void @zap(i64 %a, i64 %b) nounwind {
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entry:
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; CHECK: movq %rdi, %r13
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; CHECK-NEXT: movq %rsi, %rbp
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; CHECK-NEXT: callq addtwo
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%0 = call ghccc i64 @addtwo(i64 %a, i64 %b)
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; CHECK: callq foo
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call void @foo() nounwind
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ret void
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}
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define ghccc i64 @addtwo(i64 %x, i64 %y) nounwind {
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entry:
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; CHECK: leaq (%r13,%rbp), %rax
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%0 = add i64 %x, %y
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; CHECK-NEXT: ret
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ret i64 %0
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}
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define ghccc void @foo() nounwind {
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entry:
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; CHECK: movsd d2(%rip), %xmm6
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; CHECK-NEXT: movsd d1(%rip), %xmm5
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; CHECK-NEXT: movss f4(%rip), %xmm4
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; CHECK-NEXT: movss f3(%rip), %xmm3
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; CHECK-NEXT: movss f2(%rip), %xmm2
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; CHECK-NEXT: movss f1(%rip), %xmm1
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; CHECK-NEXT: movq splim(%rip), %r15
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; CHECK-NEXT: movq r6(%rip), %r9
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; CHECK-NEXT: movq r5(%rip), %r8
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; CHECK-NEXT: movq r4(%rip), %rdi
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; CHECK-NEXT: movq r3(%rip), %rsi
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; CHECK-NEXT: movq r2(%rip), %r14
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; CHECK-NEXT: movq r1(%rip), %rbx
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; CHECK-NEXT: movq hp(%rip), %r12
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; CHECK-NEXT: movq sp(%rip), %rbp
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; CHECK-NEXT: movq base(%rip), %r13
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%0 = load double, double* @d2
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%1 = load double, double* @d1
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%2 = load float, float* @f4
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%3 = load float, float* @f3
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%4 = load float, float* @f2
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%5 = load float, float* @f1
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%6 = load i64, i64* @splim
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%7 = load i64, i64* @r6
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%8 = load i64, i64* @r5
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%9 = load i64, i64* @r4
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%10 = load i64, i64* @r3
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%11 = load i64, i64* @r2
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%12 = load i64, i64* @r1
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%13 = load i64, i64* @hp
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%14 = load i64, i64* @sp
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%15 = load i64, i64* @base
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; CHECK: jmp bar
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tail call ghccc void @bar( i64 %15, i64 %14, i64 %13, i64 %12, i64 %11,
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i64 %10, i64 %9, i64 %8, i64 %7, i64 %6,
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float %5, float %4, float %3, float %2, double %1,
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double %0 ) nounwind
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ret void
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}
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declare ghccc void @bar(i64, i64, i64, i64, i64, i64, i64, i64, i64, i64,
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float, float, float, float, double, double)
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