llvm-6502/test/CodeGen
Jim Grosbach 88acef0b8e ARM: Improve pattern for isel mul of vector by scalar.
In addition to recognizing when the multiply's second argument is
coming from an explicit VDUPLANE, also look for a plain scalar
f32 reference and reference it via the corresponding vector
lane.

rdar://14870054

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189619 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-29 22:41:46 +00:00
..
AArch64 A minor change for an obvous problem caused by r188451: 2013-08-21 17:47:53 +00:00
ARM ARM: Improve pattern for isel mul of vector by scalar. 2013-08-29 22:41:46 +00:00
CPP [tests] Cleanup initialization of test suffixes. 2013-08-16 00:37:11 +00:00
Generic [tests] Cleanup initialization of test suffixes. 2013-08-16 00:37:11 +00:00
Hexagon Debug Info: add an identifier field to DICompositeType. 2013-08-26 22:39:55 +00:00
Inputs Debug Info: add an identifier field to DICompositeType. 2013-08-26 22:39:55 +00:00
Mips [mips][msa] Added bnz.df, bnz.v, bz.df, and bz.v 2013-08-28 12:14:50 +00:00
MSP430 [tests] Cleanup initialization of test suffixes. 2013-08-16 00:37:11 +00:00
NVPTX [NVPTX] Re-enable assembly printing support for inline assembly 2013-08-24 01:17:23 +00:00
PowerPC Debug Info: add an identifier field to DICompositeType. 2013-08-26 22:39:55 +00:00
R600 R600/SI: Enable local-memory-two-objects lit test 2013-08-27 10:28:26 +00:00
SPARC [Sparc] Add long double (f128) instructions to sparc backend. 2013-08-25 18:30:06 +00:00
SystemZ [SystemZ] Add support for TMHH, TMHL, TMLH and TMLL 2013-08-28 10:31:43 +00:00
Thumb ARM: Use "dmb sy" for barriers on M-class CPUs 2013-08-28 14:39:19 +00:00
Thumb2 ARM: make sure ARM-mode pseudo-inst requires IsARM 2013-08-23 10:16:39 +00:00
X86 AVX-512: added extend and truncate instructions. 2013-08-29 11:56:53 +00:00
XCore [tests] Cleanup initialization of test suffixes. 2013-08-16 00:37:11 +00:00