mirror of
https://github.com/c64scene-ar/llvm-6502.git
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cf852dc49b
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135037 91177308-0d34-0410-b5e6-96231b3b80d8
525 lines
21 KiB
C++
525 lines
21 KiB
C++
//===-- RuntimeDyldMachO.cpp - Run-time dynamic linker for MC-JIT ------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Implementation of the MC-JIT runtime dynamic linker.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "dyld"
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#include "llvm/ADT/OwningPtr.h"
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#include "llvm/ADT/StringRef.h"
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#include "llvm/ADT/STLExtras.h"
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#include "RuntimeDyldImpl.h"
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using namespace llvm;
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using namespace llvm::object;
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namespace llvm {
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bool RuntimeDyldMachO::
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resolveRelocation(uint8_t *Address, uint8_t *Value, bool isPCRel,
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unsigned Type, unsigned Size) {
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// This just dispatches to the proper target specific routine.
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switch (CPUType) {
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default: assert(0 && "Unsupported CPU type!");
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case mach::CTM_x86_64:
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return resolveX86_64Relocation((uintptr_t)Address, (uintptr_t)Value,
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isPCRel, Type, Size);
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case mach::CTM_ARM:
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return resolveARMRelocation((uintptr_t)Address, (uintptr_t)Value,
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isPCRel, Type, Size);
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}
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llvm_unreachable("");
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}
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bool RuntimeDyldMachO::
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resolveX86_64Relocation(uintptr_t Address, uintptr_t Value,
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bool isPCRel, unsigned Type,
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unsigned Size) {
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// If the relocation is PC-relative, the value to be encoded is the
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// pointer difference.
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if (isPCRel)
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// FIXME: It seems this value needs to be adjusted by 4 for an effective PC
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// address. Is that expected? Only for branches, perhaps?
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Value -= Address + 4;
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switch(Type) {
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default:
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llvm_unreachable("Invalid relocation type!");
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case macho::RIT_X86_64_Unsigned:
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case macho::RIT_X86_64_Branch: {
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// Mask in the target value a byte at a time (we don't have an alignment
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// guarantee for the target address, so this is safest).
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uint8_t *p = (uint8_t*)Address;
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for (unsigned i = 0; i < Size; ++i) {
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*p++ = (uint8_t)Value;
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Value >>= 8;
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}
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return false;
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}
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case macho::RIT_X86_64_Signed:
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case macho::RIT_X86_64_GOTLoad:
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case macho::RIT_X86_64_GOT:
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case macho::RIT_X86_64_Subtractor:
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case macho::RIT_X86_64_Signed1:
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case macho::RIT_X86_64_Signed2:
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case macho::RIT_X86_64_Signed4:
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case macho::RIT_X86_64_TLV:
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return Error("Relocation type not implemented yet!");
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}
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return false;
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}
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bool RuntimeDyldMachO::resolveARMRelocation(uintptr_t Address, uintptr_t Value,
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bool isPCRel, unsigned Type,
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unsigned Size) {
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// If the relocation is PC-relative, the value to be encoded is the
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// pointer difference.
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if (isPCRel) {
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Value -= Address;
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// ARM PCRel relocations have an effective-PC offset of two instructions
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// (four bytes in Thumb mode, 8 bytes in ARM mode).
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// FIXME: For now, assume ARM mode.
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Value -= 8;
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}
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switch(Type) {
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default:
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llvm_unreachable("Invalid relocation type!");
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case macho::RIT_Vanilla: {
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llvm_unreachable("Invalid relocation type!");
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// Mask in the target value a byte at a time (we don't have an alignment
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// guarantee for the target address, so this is safest).
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uint8_t *p = (uint8_t*)Address;
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for (unsigned i = 0; i < Size; ++i) {
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*p++ = (uint8_t)Value;
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Value >>= 8;
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}
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break;
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}
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case macho::RIT_ARM_Branch24Bit: {
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// Mask the value into the target address. We know instructions are
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// 32-bit aligned, so we can do it all at once.
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uint32_t *p = (uint32_t*)Address;
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// The low two bits of the value are not encoded.
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Value >>= 2;
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// Mask the value to 24 bits.
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Value &= 0xffffff;
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// FIXME: If the destination is a Thumb function (and the instruction
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// is a non-predicated BL instruction), we need to change it to a BLX
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// instruction instead.
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// Insert the value into the instruction.
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*p = (*p & ~0xffffff) | Value;
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break;
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}
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case macho::RIT_ARM_ThumbBranch22Bit:
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case macho::RIT_ARM_ThumbBranch32Bit:
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case macho::RIT_ARM_Half:
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case macho::RIT_ARM_HalfDifference:
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case macho::RIT_Pair:
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case macho::RIT_Difference:
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case macho::RIT_ARM_LocalDifference:
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case macho::RIT_ARM_PreboundLazyPointer:
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return Error("Relocation type not implemented yet!");
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}
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return false;
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}
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bool RuntimeDyldMachO::
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loadSegment32(const MachOObject *Obj,
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const MachOObject::LoadCommandInfo *SegmentLCI,
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const InMemoryStruct<macho::SymtabLoadCommand> &SymtabLC) {
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InMemoryStruct<macho::SegmentLoadCommand> SegmentLC;
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Obj->ReadSegmentLoadCommand(*SegmentLCI, SegmentLC);
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if (!SegmentLC)
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return Error("unable to load segment load command");
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for (unsigned SectNum = 0; SectNum != SegmentLC->NumSections; ++SectNum) {
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InMemoryStruct<macho::Section> Sect;
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Obj->ReadSection(*SegmentLCI, SectNum, Sect);
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if (!Sect)
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return Error("unable to load section: '" + Twine(SectNum) + "'");
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// FIXME: For the time being, we're only loading text segments.
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if (Sect->Flags != 0x80000400)
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continue;
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// Address and names of symbols in the section.
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typedef std::pair<uint64_t, StringRef> SymbolEntry;
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SmallVector<SymbolEntry, 64> Symbols;
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// Index of all the names, in this section or not. Used when we're
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// dealing with relocation entries.
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SmallVector<StringRef, 64> SymbolNames;
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for (unsigned i = 0; i != SymtabLC->NumSymbolTableEntries; ++i) {
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InMemoryStruct<macho::SymbolTableEntry> STE;
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Obj->ReadSymbolTableEntry(SymtabLC->SymbolTableOffset, i, STE);
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if (!STE)
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return Error("unable to read symbol: '" + Twine(i) + "'");
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if (STE->SectionIndex > SegmentLC->NumSections)
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return Error("invalid section index for symbol: '" + Twine(i) + "'");
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// Get the symbol name.
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StringRef Name = Obj->getStringAtIndex(STE->StringIndex);
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SymbolNames.push_back(Name);
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// Just skip symbols not defined in this section.
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if ((unsigned)STE->SectionIndex - 1 != SectNum)
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continue;
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// FIXME: Check the symbol type and flags.
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if (STE->Type != 0xF) // external, defined in this section.
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continue;
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// Flags == 0x8 marks a thumb function for ARM, which is fine as it
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// doesn't require any special handling here.
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if (STE->Flags != 0x0 && STE->Flags != 0x8)
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continue;
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// Remember the symbol.
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Symbols.push_back(SymbolEntry(STE->Value, Name));
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DEBUG(dbgs() << "Function sym: '" << Name << "' @ " <<
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(Sect->Address + STE->Value) << "\n");
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}
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// Sort the symbols by address, just in case they didn't come in that way.
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array_pod_sort(Symbols.begin(), Symbols.end());
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// If there weren't any functions (odd, but just in case...)
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if (!Symbols.size())
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continue;
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// Extract the function data.
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uint8_t *Base = (uint8_t*)Obj->getData(SegmentLC->FileOffset,
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SegmentLC->FileSize).data();
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for (unsigned i = 0, e = Symbols.size() - 1; i != e; ++i) {
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uint64_t StartOffset = Sect->Address + Symbols[i].first;
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uint64_t EndOffset = Symbols[i + 1].first - 1;
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DEBUG(dbgs() << "Extracting function: " << Symbols[i].second
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<< " from [" << StartOffset << ", " << EndOffset << "]\n");
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extractFunction(Symbols[i].second, Base + StartOffset, Base + EndOffset);
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}
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// The last symbol we do after since the end address is calculated
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// differently because there is no next symbol to reference.
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uint64_t StartOffset = Symbols[Symbols.size() - 1].first;
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uint64_t EndOffset = Sect->Size - 1;
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DEBUG(dbgs() << "Extracting function: " << Symbols[Symbols.size()-1].second
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<< " from [" << StartOffset << ", " << EndOffset << "]\n");
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extractFunction(Symbols[Symbols.size()-1].second,
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Base + StartOffset, Base + EndOffset);
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// Now extract the relocation information for each function and process it.
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for (unsigned j = 0; j != Sect->NumRelocationTableEntries; ++j) {
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InMemoryStruct<macho::RelocationEntry> RE;
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Obj->ReadRelocationEntry(Sect->RelocationTableOffset, j, RE);
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if (RE->Word0 & macho::RF_Scattered)
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return Error("NOT YET IMPLEMENTED: scattered relocations.");
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// Word0 of the relocation is the offset into the section where the
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// relocation should be applied. We need to translate that into an
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// offset into a function since that's our atom.
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uint32_t Offset = RE->Word0;
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// Look for the function containing the address. This is used for JIT
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// code, so the number of functions in section is almost always going
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// to be very small (usually just one), so until we have use cases
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// where that's not true, just use a trivial linear search.
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unsigned SymbolNum;
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unsigned NumSymbols = Symbols.size();
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assert(NumSymbols > 0 && Symbols[0].first <= Offset &&
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"No symbol containing relocation!");
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for (SymbolNum = 0; SymbolNum < NumSymbols - 1; ++SymbolNum)
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if (Symbols[SymbolNum + 1].first > Offset)
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break;
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// Adjust the offset to be relative to the symbol.
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Offset -= Symbols[SymbolNum].first;
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// Get the name of the symbol containing the relocation.
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StringRef TargetName = SymbolNames[SymbolNum];
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bool isExtern = (RE->Word1 >> 27) & 1;
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// Figure out the source symbol of the relocation. If isExtern is true,
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// this relocation references the symbol table, otherwise it references
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// a section in the same object, numbered from 1 through NumSections
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// (SectionBases is [0, NumSections-1]).
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// FIXME: Some targets (ARM) use internal relocations even for
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// externally visible symbols, if the definition is in the same
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// file as the reference. We need to convert those back to by-name
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// references. We can resolve the address based on the section
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// offset and see if we have a symbol at that address. If we do,
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// use that; otherwise, puke.
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if (!isExtern)
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return Error("Internal relocations not supported.");
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uint32_t SourceNum = RE->Word1 & 0xffffff; // 24-bit value
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StringRef SourceName = SymbolNames[SourceNum];
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// FIXME: Get the relocation addend from the target address.
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// Now store the relocation information. Associate it with the source
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// symbol.
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Relocations[SourceName].push_back(RelocationEntry(TargetName,
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Offset,
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RE->Word1,
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0 /*Addend*/));
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DEBUG(dbgs() << "Relocation at '" << TargetName << "' + " << Offset
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<< " from '" << SourceName << "(Word1: "
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<< format("0x%x", RE->Word1) << ")\n");
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}
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}
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return false;
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}
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bool RuntimeDyldMachO::
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loadSegment64(const MachOObject *Obj,
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const MachOObject::LoadCommandInfo *SegmentLCI,
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const InMemoryStruct<macho::SymtabLoadCommand> &SymtabLC) {
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InMemoryStruct<macho::Segment64LoadCommand> Segment64LC;
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Obj->ReadSegment64LoadCommand(*SegmentLCI, Segment64LC);
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if (!Segment64LC)
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return Error("unable to load segment load command");
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for (unsigned SectNum = 0; SectNum != Segment64LC->NumSections; ++SectNum) {
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InMemoryStruct<macho::Section64> Sect;
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Obj->ReadSection64(*SegmentLCI, SectNum, Sect);
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if (!Sect)
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return Error("unable to load section: '" + Twine(SectNum) + "'");
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// FIXME: For the time being, we're only loading text segments.
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if (Sect->Flags != 0x80000400)
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continue;
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// Address and names of symbols in the section.
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typedef std::pair<uint64_t, StringRef> SymbolEntry;
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SmallVector<SymbolEntry, 64> Symbols;
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// Index of all the names, in this section or not. Used when we're
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// dealing with relocation entries.
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SmallVector<StringRef, 64> SymbolNames;
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for (unsigned i = 0; i != SymtabLC->NumSymbolTableEntries; ++i) {
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InMemoryStruct<macho::Symbol64TableEntry> STE;
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Obj->ReadSymbol64TableEntry(SymtabLC->SymbolTableOffset, i, STE);
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if (!STE)
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return Error("unable to read symbol: '" + Twine(i) + "'");
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if (STE->SectionIndex > Segment64LC->NumSections)
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return Error("invalid section index for symbol: '" + Twine(i) + "'");
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// Get the symbol name.
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StringRef Name = Obj->getStringAtIndex(STE->StringIndex);
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SymbolNames.push_back(Name);
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// Just skip symbols not defined in this section.
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if ((unsigned)STE->SectionIndex - 1 != SectNum)
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continue;
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// FIXME: Check the symbol type and flags.
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if (STE->Type != 0xF) // external, defined in this section.
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continue;
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if (STE->Flags != 0x0)
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continue;
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// Remember the symbol.
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Symbols.push_back(SymbolEntry(STE->Value, Name));
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DEBUG(dbgs() << "Function sym: '" << Name << "' @ " <<
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(Sect->Address + STE->Value) << "\n");
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}
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// Sort the symbols by address, just in case they didn't come in that way.
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array_pod_sort(Symbols.begin(), Symbols.end());
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// If there weren't any functions (odd, but just in case...)
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if (!Symbols.size())
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continue;
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// Extract the function data.
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uint8_t *Base = (uint8_t*)Obj->getData(Segment64LC->FileOffset,
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Segment64LC->FileSize).data();
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for (unsigned i = 0, e = Symbols.size() - 1; i != e; ++i) {
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uint64_t StartOffset = Sect->Address + Symbols[i].first;
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uint64_t EndOffset = Symbols[i + 1].first - 1;
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DEBUG(dbgs() << "Extracting function: " << Symbols[i].second
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<< " from [" << StartOffset << ", " << EndOffset << "]\n");
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extractFunction(Symbols[i].second, Base + StartOffset, Base + EndOffset);
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}
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// The last symbol we do after since the end address is calculated
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// differently because there is no next symbol to reference.
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uint64_t StartOffset = Symbols[Symbols.size() - 1].first;
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uint64_t EndOffset = Sect->Size - 1;
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DEBUG(dbgs() << "Extracting function: " << Symbols[Symbols.size()-1].second
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<< " from [" << StartOffset << ", " << EndOffset << "]\n");
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extractFunction(Symbols[Symbols.size()-1].second,
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Base + StartOffset, Base + EndOffset);
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// Now extract the relocation information for each function and process it.
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for (unsigned j = 0; j != Sect->NumRelocationTableEntries; ++j) {
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InMemoryStruct<macho::RelocationEntry> RE;
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Obj->ReadRelocationEntry(Sect->RelocationTableOffset, j, RE);
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if (RE->Word0 & macho::RF_Scattered)
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return Error("NOT YET IMPLEMENTED: scattered relocations.");
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// Word0 of the relocation is the offset into the section where the
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// relocation should be applied. We need to translate that into an
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// offset into a function since that's our atom.
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uint32_t Offset = RE->Word0;
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// Look for the function containing the address. This is used for JIT
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// code, so the number of functions in section is almost always going
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// to be very small (usually just one), so until we have use cases
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// where that's not true, just use a trivial linear search.
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unsigned SymbolNum;
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unsigned NumSymbols = Symbols.size();
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assert(NumSymbols > 0 && Symbols[0].first <= Offset &&
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"No symbol containing relocation!");
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for (SymbolNum = 0; SymbolNum < NumSymbols - 1; ++SymbolNum)
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if (Symbols[SymbolNum + 1].first > Offset)
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break;
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// Adjust the offset to be relative to the symbol.
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Offset -= Symbols[SymbolNum].first;
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// Get the name of the symbol containing the relocation.
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StringRef TargetName = SymbolNames[SymbolNum];
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bool isExtern = (RE->Word1 >> 27) & 1;
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// Figure out the source symbol of the relocation. If isExtern is true,
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// this relocation references the symbol table, otherwise it references
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// a section in the same object, numbered from 1 through NumSections
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// (SectionBases is [0, NumSections-1]).
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if (!isExtern)
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return Error("Internal relocations not supported.");
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uint32_t SourceNum = RE->Word1 & 0xffffff; // 24-bit value
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StringRef SourceName = SymbolNames[SourceNum];
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// FIXME: Get the relocation addend from the target address.
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// Now store the relocation information. Associate it with the source
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// symbol.
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Relocations[SourceName].push_back(RelocationEntry(TargetName,
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Offset,
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RE->Word1,
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0 /*Addend*/));
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DEBUG(dbgs() << "Relocation at '" << TargetName << "' + " << Offset
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<< " from '" << SourceName << "(Word1: "
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<< format("0x%x", RE->Word1) << ")\n");
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}
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}
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return false;
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}
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bool RuntimeDyldMachO::loadObject(MemoryBuffer *InputBuffer) {
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// If the linker is in an error state, don't do anything.
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if (hasError())
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return true;
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// Load the Mach-O wrapper object.
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std::string ErrorStr;
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OwningPtr<MachOObject> Obj(
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MachOObject::LoadFromBuffer(InputBuffer, &ErrorStr));
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if (!Obj)
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return Error("unable to load object: '" + ErrorStr + "'");
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// Get the CPU type information from the header.
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const macho::Header &Header = Obj->getHeader();
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// FIXME: Error checking that the loaded object is compatible with
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// the system we're running on.
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CPUType = Header.CPUType;
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CPUSubtype = Header.CPUSubtype;
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// Validate that the load commands match what we expect.
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const MachOObject::LoadCommandInfo *SegmentLCI = 0, *SymtabLCI = 0,
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*DysymtabLCI = 0;
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for (unsigned i = 0; i != Header.NumLoadCommands; ++i) {
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const MachOObject::LoadCommandInfo &LCI = Obj->getLoadCommandInfo(i);
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switch (LCI.Command.Type) {
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case macho::LCT_Segment:
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case macho::LCT_Segment64:
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if (SegmentLCI)
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return Error("unexpected input object (multiple segments)");
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SegmentLCI = &LCI;
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break;
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case macho::LCT_Symtab:
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if (SymtabLCI)
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return Error("unexpected input object (multiple symbol tables)");
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SymtabLCI = &LCI;
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break;
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case macho::LCT_Dysymtab:
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if (DysymtabLCI)
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return Error("unexpected input object (multiple symbol tables)");
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DysymtabLCI = &LCI;
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break;
|
|
default:
|
|
return Error("unexpected input object (unexpected load command");
|
|
}
|
|
}
|
|
|
|
if (!SymtabLCI)
|
|
return Error("no symbol table found in object");
|
|
if (!SegmentLCI)
|
|
return Error("no symbol table found in object");
|
|
|
|
// Read and register the symbol table data.
|
|
InMemoryStruct<macho::SymtabLoadCommand> SymtabLC;
|
|
Obj->ReadSymtabLoadCommand(*SymtabLCI, SymtabLC);
|
|
if (!SymtabLC)
|
|
return Error("unable to load symbol table load command");
|
|
Obj->RegisterStringTable(*SymtabLC);
|
|
|
|
// Read the dynamic link-edit information, if present (not present in static
|
|
// objects).
|
|
if (DysymtabLCI) {
|
|
InMemoryStruct<macho::DysymtabLoadCommand> DysymtabLC;
|
|
Obj->ReadDysymtabLoadCommand(*DysymtabLCI, DysymtabLC);
|
|
if (!DysymtabLC)
|
|
return Error("unable to load dynamic link-exit load command");
|
|
|
|
// FIXME: We don't support anything interesting yet.
|
|
// if (DysymtabLC->LocalSymbolsIndex != 0)
|
|
// return Error("NOT YET IMPLEMENTED: local symbol entries");
|
|
// if (DysymtabLC->ExternalSymbolsIndex != 0)
|
|
// return Error("NOT YET IMPLEMENTED: non-external symbol entries");
|
|
// if (DysymtabLC->UndefinedSymbolsIndex != SymtabLC->NumSymbolTableEntries)
|
|
// return Error("NOT YET IMPLEMENTED: undefined symbol entries");
|
|
}
|
|
|
|
// Load the segment load command.
|
|
if (SegmentLCI->Command.Type == macho::LCT_Segment) {
|
|
if (loadSegment32(Obj.get(), SegmentLCI, SymtabLC))
|
|
return true;
|
|
} else {
|
|
if (loadSegment64(Obj.get(), SegmentLCI, SymtabLC))
|
|
return true;
|
|
}
|
|
|
|
return false;
|
|
}
|
|
|
|
// Assign an address to a symbol name and resolve all the relocations
|
|
// associated with it.
|
|
void RuntimeDyldMachO::reassignSymbolAddress(StringRef Name, uint8_t *Addr) {
|
|
// Assign the address in our symbol table.
|
|
SymbolTable[Name] = Addr;
|
|
|
|
RelocationList &Relocs = Relocations[Name];
|
|
for (unsigned i = 0, e = Relocs.size(); i != e; ++i) {
|
|
RelocationEntry &RE = Relocs[i];
|
|
uint8_t *Target = SymbolTable[RE.Target] + RE.Offset;
|
|
bool isPCRel = (RE.Data >> 24) & 1;
|
|
unsigned Type = (RE.Data >> 28) & 0xf;
|
|
unsigned Size = 1 << ((RE.Data >> 25) & 3);
|
|
|
|
DEBUG(dbgs() << "Resolving relocation at '" << RE.Target
|
|
<< "' + " << RE.Offset << " (" << format("%p", Target) << ")"
|
|
<< " from '" << Name << " (" << format("%p", Addr) << ")"
|
|
<< "(" << (isPCRel ? "pcrel" : "absolute")
|
|
<< ", type: " << Type << ", Size: " << Size << ").\n");
|
|
|
|
resolveRelocation(Target, Addr, isPCRel, Type, Size);
|
|
RE.isResolved = true;
|
|
}
|
|
}
|
|
|
|
bool RuntimeDyldMachO::isKnownFormat(const MemoryBuffer *InputBuffer) {
|
|
StringRef Magic = InputBuffer->getBuffer().slice(0, 4);
|
|
if (Magic == "\xFE\xED\xFA\xCE") return true;
|
|
if (Magic == "\xCE\xFA\xED\xFE") return true;
|
|
if (Magic == "\xFE\xED\xFA\xCF") return true;
|
|
if (Magic == "\xCF\xFA\xED\xFE") return true;
|
|
return false;
|
|
}
|
|
|
|
} // end namespace llvm
|