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f70e0c216c
implementation from the TargetMachine directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10636 91177308-0d34-0410-b5e6-96231b3b80d8
53 lines
1.8 KiB
C++
53 lines
1.8 KiB
C++
//===-- SparcTargetMachine.h - Define TargetMachine for Sparc ---*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the top-level UltraSPARC target machine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef SPARC_TARGETMACHINE_H
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#define SPARC_TARGETMACHINE_H
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#include "llvm/Target/TargetFrameInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "SparcInstrInfo.h"
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#include "SparcInternals.h"
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#include "SparcRegInfo.h"
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#include "SparcFrameInfo.h"
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#include "SparcJITInfo.h"
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namespace llvm {
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class PassManager;
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class SparcTargetMachine : public TargetMachine {
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SparcInstrInfo instrInfo;
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SparcSchedInfo schedInfo;
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SparcRegInfo regInfo;
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SparcFrameInfo frameInfo;
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SparcCacheInfo cacheInfo;
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SparcJITInfo jitInfo;
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public:
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SparcTargetMachine(IntrinsicLowering *IL);
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virtual const TargetInstrInfo &getInstrInfo() const { return instrInfo; }
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virtual const TargetSchedInfo &getSchedInfo() const { return schedInfo; }
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virtual const TargetRegInfo &getRegInfo() const { return regInfo; }
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virtual const TargetFrameInfo &getFrameInfo() const { return frameInfo; }
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virtual const TargetCacheInfo &getCacheInfo() const { return cacheInfo; }
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virtual TargetJITInfo *getJITInfo() { return &jitInfo; }
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virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out);
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virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM,
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MachineCodeEmitter &MCE);
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};
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} // End llvm namespace
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#endif
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