llvm-6502/test/Transforms/GVN/2011-06-01-NonLocalMemdepMiscompile.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

62 lines
1.7 KiB
LLVM

; RUN: opt < %s -basicaa -gvn -S | FileCheck %s
; This test is checking that (a) this doesn't crash, and (b) we don't
; conclude the value of %tmp17 is available in bb1.bb15_crit_edge.
; rdar://9429882
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-macosx10.7.0"
define i1 @rb_intern() nounwind ssp {
; CHECK-LABEL: @rb_intern(
bb:
%tmp = alloca i8*, align 8
store i8* null, i8** %tmp, align 8
store i8 undef, i8* null, align 536870912
br label %bb1
bb1:
br i1 undef, label %bb3, label %bb15
; CHECK: bb1:
; CHECK: [[TMP:%.*]] = phi i8* [ getelementptr (i8* null, i64 undef), %bb10 ], [ null, %bb ]
; CHECK: bb1.bb15_crit_edge:
; CHECK: %tmp17.pre = load i8, i8* [[TMP]], align 1
bb3:
call void @isalnum()
br i1 undef, label %bb10, label %bb5
bb5:
br i1 undef, label %bb10, label %bb6
bb6:
%tmp7 = load i8*, i8** %tmp, align 8
%tmp8 = load i8, i8* %tmp7, align 1
%tmp9 = zext i8 %tmp8 to i64
br i1 undef, label %bb15, label %bb10
bb10:
%tmp11 = load i8*, i8** %tmp, align 8
%tmp12 = load i8, i8* %tmp11, align 1
%tmp13 = zext i8 %tmp12 to i64
%tmp14 = getelementptr inbounds i8, i8* null, i64 undef
store i8* %tmp14, i8** %tmp, align 8
br label %bb1
bb15:
%tmp16 = load i8*, i8** %tmp, align 8
%tmp17 = load i8, i8* %tmp16, align 1
%tmp18 = icmp eq i8 %tmp17, 0
br label %bb19
; CHECK: bb15:
; CHECK: %tmp17 = phi i8 [ %tmp17.pre, %bb1.bb15_crit_edge ], [ %tmp8, %bb6 ]
bb19: ; preds = %bb15
ret i1 %tmp18
}
declare void @isalnum() nounwind inlinehint ssp